xref: /OK3568_Linux_fs/kernel/arch/powerpc/platforms/4xx/msi.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Adding PCI-E MSI support for PPC4XX SoCs.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2010, Applied Micro Circuits Corporation
6*4882a593Smuzhiyun  * Authors:	Tirumala R Marri <tmarri@apm.com>
7*4882a593Smuzhiyun  *		Feng Kan <fkan@apm.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/irq.h>
11*4882a593Smuzhiyun #include <linux/pci.h>
12*4882a593Smuzhiyun #include <linux/msi.h>
13*4882a593Smuzhiyun #include <linux/of_platform.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/export.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <asm/prom.h>
18*4882a593Smuzhiyun #include <asm/hw_irq.h>
19*4882a593Smuzhiyun #include <asm/ppc-pci.h>
20*4882a593Smuzhiyun #include <asm/dcr.h>
21*4882a593Smuzhiyun #include <asm/dcr-regs.h>
22*4882a593Smuzhiyun #include <asm/msi_bitmap.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define PEIH_TERMADH	0x00
25*4882a593Smuzhiyun #define PEIH_TERMADL	0x08
26*4882a593Smuzhiyun #define PEIH_MSIED	0x10
27*4882a593Smuzhiyun #define PEIH_MSIMK	0x18
28*4882a593Smuzhiyun #define PEIH_MSIASS	0x20
29*4882a593Smuzhiyun #define PEIH_FLUSH0	0x30
30*4882a593Smuzhiyun #define PEIH_FLUSH1	0x38
31*4882a593Smuzhiyun #define PEIH_CNTRST	0x48
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static int msi_irqs;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct ppc4xx_msi {
36*4882a593Smuzhiyun 	u32 msi_addr_lo;
37*4882a593Smuzhiyun 	u32 msi_addr_hi;
38*4882a593Smuzhiyun 	void __iomem *msi_regs;
39*4882a593Smuzhiyun 	int *msi_virqs;
40*4882a593Smuzhiyun 	struct msi_bitmap bitmap;
41*4882a593Smuzhiyun 	struct device_node *msi_dev;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static struct ppc4xx_msi ppc4xx_msi;
45*4882a593Smuzhiyun 
ppc4xx_msi_init_allocator(struct platform_device * dev,struct ppc4xx_msi * msi_data)46*4882a593Smuzhiyun static int ppc4xx_msi_init_allocator(struct platform_device *dev,
47*4882a593Smuzhiyun 		struct ppc4xx_msi *msi_data)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	int err;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs,
52*4882a593Smuzhiyun 			      dev->dev.of_node);
53*4882a593Smuzhiyun 	if (err)
54*4882a593Smuzhiyun 		return err;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	err = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
57*4882a593Smuzhiyun 	if (err < 0) {
58*4882a593Smuzhiyun 		msi_bitmap_free(&msi_data->bitmap);
59*4882a593Smuzhiyun 		return err;
60*4882a593Smuzhiyun 	}
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	return 0;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
ppc4xx_setup_msi_irqs(struct pci_dev * dev,int nvec,int type)65*4882a593Smuzhiyun static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	int int_no = -ENOMEM;
68*4882a593Smuzhiyun 	unsigned int virq;
69*4882a593Smuzhiyun 	struct msi_msg msg;
70*4882a593Smuzhiyun 	struct msi_desc *entry;
71*4882a593Smuzhiyun 	struct ppc4xx_msi *msi_data = &ppc4xx_msi;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	dev_dbg(&dev->dev, "PCIE-MSI:%s called. vec %x type %d\n",
74*4882a593Smuzhiyun 		__func__, nvec, type);
75*4882a593Smuzhiyun 	if (type == PCI_CAP_ID_MSIX)
76*4882a593Smuzhiyun 		pr_debug("ppc4xx msi: MSI-X untested, trying anyway.\n");
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	msi_data->msi_virqs = kmalloc_array(msi_irqs, sizeof(int), GFP_KERNEL);
79*4882a593Smuzhiyun 	if (!msi_data->msi_virqs)
80*4882a593Smuzhiyun 		return -ENOMEM;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	for_each_pci_msi_entry(entry, dev) {
83*4882a593Smuzhiyun 		int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
84*4882a593Smuzhiyun 		if (int_no >= 0)
85*4882a593Smuzhiyun 			break;
86*4882a593Smuzhiyun 		if (int_no < 0) {
87*4882a593Smuzhiyun 			pr_debug("%s: fail allocating msi interrupt\n",
88*4882a593Smuzhiyun 					__func__);
89*4882a593Smuzhiyun 		}
90*4882a593Smuzhiyun 		virq = irq_of_parse_and_map(msi_data->msi_dev, int_no);
91*4882a593Smuzhiyun 		if (!virq) {
92*4882a593Smuzhiyun 			dev_err(&dev->dev, "%s: fail mapping irq\n", __func__);
93*4882a593Smuzhiyun 			msi_bitmap_free_hwirqs(&msi_data->bitmap, int_no, 1);
94*4882a593Smuzhiyun 			return -ENOSPC;
95*4882a593Smuzhiyun 		}
96*4882a593Smuzhiyun 		dev_dbg(&dev->dev, "%s: virq = %d\n", __func__, virq);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 		/* Setup msi address space */
99*4882a593Smuzhiyun 		msg.address_hi = msi_data->msi_addr_hi;
100*4882a593Smuzhiyun 		msg.address_lo = msi_data->msi_addr_lo;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 		irq_set_msi_desc(virq, entry);
103*4882a593Smuzhiyun 		msg.data = int_no;
104*4882a593Smuzhiyun 		pci_write_msi_msg(virq, &msg);
105*4882a593Smuzhiyun 	}
106*4882a593Smuzhiyun 	return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
ppc4xx_teardown_msi_irqs(struct pci_dev * dev)109*4882a593Smuzhiyun void ppc4xx_teardown_msi_irqs(struct pci_dev *dev)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	struct msi_desc *entry;
112*4882a593Smuzhiyun 	struct ppc4xx_msi *msi_data = &ppc4xx_msi;
113*4882a593Smuzhiyun 	irq_hw_number_t hwirq;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n");
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	for_each_pci_msi_entry(entry, dev) {
118*4882a593Smuzhiyun 		if (!entry->irq)
119*4882a593Smuzhiyun 			continue;
120*4882a593Smuzhiyun 		hwirq = virq_to_hw(entry->irq);
121*4882a593Smuzhiyun 		irq_set_msi_desc(entry->irq, NULL);
122*4882a593Smuzhiyun 		irq_dispose_mapping(entry->irq);
123*4882a593Smuzhiyun 		msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
124*4882a593Smuzhiyun 	}
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
ppc4xx_setup_pcieh_hw(struct platform_device * dev,struct resource res,struct ppc4xx_msi * msi)127*4882a593Smuzhiyun static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
128*4882a593Smuzhiyun 				 struct resource res, struct ppc4xx_msi *msi)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	const u32 *msi_data;
131*4882a593Smuzhiyun 	const u32 *msi_mask;
132*4882a593Smuzhiyun 	const u32 *sdr_addr;
133*4882a593Smuzhiyun 	dma_addr_t msi_phys;
134*4882a593Smuzhiyun 	void *msi_virt;
135*4882a593Smuzhiyun 	int err;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	sdr_addr = of_get_property(dev->dev.of_node, "sdr-base", NULL);
138*4882a593Smuzhiyun 	if (!sdr_addr)
139*4882a593Smuzhiyun 		return -EINVAL;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	msi_data = of_get_property(dev->dev.of_node, "msi-data", NULL);
142*4882a593Smuzhiyun 	if (!msi_data)
143*4882a593Smuzhiyun 		return -EINVAL;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	msi_mask = of_get_property(dev->dev.of_node, "msi-mask", NULL);
146*4882a593Smuzhiyun 	if (!msi_mask)
147*4882a593Smuzhiyun 		return -EINVAL;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
150*4882a593Smuzhiyun 	if (!msi->msi_dev)
151*4882a593Smuzhiyun 		return -ENODEV;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	msi->msi_regs = of_iomap(msi->msi_dev, 0);
154*4882a593Smuzhiyun 	if (!msi->msi_regs) {
155*4882a593Smuzhiyun 		dev_err(&dev->dev, "of_iomap failed\n");
156*4882a593Smuzhiyun 		err = -ENOMEM;
157*4882a593Smuzhiyun 		goto node_put;
158*4882a593Smuzhiyun 	}
159*4882a593Smuzhiyun 	dev_dbg(&dev->dev, "PCIE-MSI: msi register mapped 0x%x 0x%x\n",
160*4882a593Smuzhiyun 		(u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
163*4882a593Smuzhiyun 	if (!msi_virt) {
164*4882a593Smuzhiyun 		err = -ENOMEM;
165*4882a593Smuzhiyun 		goto iounmap;
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 	msi->msi_addr_hi = upper_32_bits(msi_phys);
168*4882a593Smuzhiyun 	msi->msi_addr_lo = lower_32_bits(msi_phys & 0xffffffff);
169*4882a593Smuzhiyun 	dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
170*4882a593Smuzhiyun 		msi->msi_addr_hi, msi->msi_addr_lo);
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start));	/*HIGH addr */
173*4882a593Smuzhiyun 	mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start));	/* Low addr */
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	/* Progam the Interrupt handler Termination addr registers */
176*4882a593Smuzhiyun 	out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
177*4882a593Smuzhiyun 	out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo);
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	/* Program MSI Expected data and Mask bits */
180*4882a593Smuzhiyun 	out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
181*4882a593Smuzhiyun 	out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	return 0;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun iounmap:
188*4882a593Smuzhiyun 	iounmap(msi->msi_regs);
189*4882a593Smuzhiyun node_put:
190*4882a593Smuzhiyun 	of_node_put(msi->msi_dev);
191*4882a593Smuzhiyun 	return err;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
ppc4xx_of_msi_remove(struct platform_device * dev)194*4882a593Smuzhiyun static int ppc4xx_of_msi_remove(struct platform_device *dev)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun 	struct ppc4xx_msi *msi = dev->dev.platform_data;
197*4882a593Smuzhiyun 	int i;
198*4882a593Smuzhiyun 	int virq;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	for (i = 0; i < msi_irqs; i++) {
201*4882a593Smuzhiyun 		virq = msi->msi_virqs[i];
202*4882a593Smuzhiyun 		if (virq)
203*4882a593Smuzhiyun 			irq_dispose_mapping(virq);
204*4882a593Smuzhiyun 	}
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	if (msi->bitmap.bitmap)
207*4882a593Smuzhiyun 		msi_bitmap_free(&msi->bitmap);
208*4882a593Smuzhiyun 	iounmap(msi->msi_regs);
209*4882a593Smuzhiyun 	of_node_put(msi->msi_dev);
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	return 0;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun 
ppc4xx_msi_probe(struct platform_device * dev)214*4882a593Smuzhiyun static int ppc4xx_msi_probe(struct platform_device *dev)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun 	struct ppc4xx_msi *msi;
217*4882a593Smuzhiyun 	struct resource res;
218*4882a593Smuzhiyun 	int err = 0;
219*4882a593Smuzhiyun 	struct pci_controller *phb;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	msi = devm_kzalloc(&dev->dev, sizeof(*msi), GFP_KERNEL);
224*4882a593Smuzhiyun 	if (!msi)
225*4882a593Smuzhiyun 		return -ENOMEM;
226*4882a593Smuzhiyun 	dev->dev.platform_data = msi;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	/* Get MSI ranges */
229*4882a593Smuzhiyun 	err = of_address_to_resource(dev->dev.of_node, 0, &res);
230*4882a593Smuzhiyun 	if (err) {
231*4882a593Smuzhiyun 		dev_err(&dev->dev, "%pOF resource error!\n", dev->dev.of_node);
232*4882a593Smuzhiyun 		return err;
233*4882a593Smuzhiyun 	}
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	msi_irqs = of_irq_count(dev->dev.of_node);
236*4882a593Smuzhiyun 	if (!msi_irqs)
237*4882a593Smuzhiyun 		return -ENODEV;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	err = ppc4xx_setup_pcieh_hw(dev, res, msi);
240*4882a593Smuzhiyun 	if (err)
241*4882a593Smuzhiyun 		return err;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	err = ppc4xx_msi_init_allocator(dev, msi);
244*4882a593Smuzhiyun 	if (err) {
245*4882a593Smuzhiyun 		dev_err(&dev->dev, "Error allocating MSI bitmap\n");
246*4882a593Smuzhiyun 		goto error_out;
247*4882a593Smuzhiyun 	}
248*4882a593Smuzhiyun 	ppc4xx_msi = *msi;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	list_for_each_entry(phb, &hose_list, list_node) {
251*4882a593Smuzhiyun 		phb->controller_ops.setup_msi_irqs = ppc4xx_setup_msi_irqs;
252*4882a593Smuzhiyun 		phb->controller_ops.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
253*4882a593Smuzhiyun 	}
254*4882a593Smuzhiyun 	return 0;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun error_out:
257*4882a593Smuzhiyun 	ppc4xx_of_msi_remove(dev);
258*4882a593Smuzhiyun 	return err;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun static const struct of_device_id ppc4xx_msi_ids[] = {
261*4882a593Smuzhiyun 	{
262*4882a593Smuzhiyun 		.compatible = "amcc,ppc4xx-msi",
263*4882a593Smuzhiyun 	},
264*4882a593Smuzhiyun 	{}
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun static struct platform_driver ppc4xx_msi_driver = {
267*4882a593Smuzhiyun 	.probe = ppc4xx_msi_probe,
268*4882a593Smuzhiyun 	.remove = ppc4xx_of_msi_remove,
269*4882a593Smuzhiyun 	.driver = {
270*4882a593Smuzhiyun 		   .name = "ppc4xx-msi",
271*4882a593Smuzhiyun 		   .of_match_table = ppc4xx_msi_ids,
272*4882a593Smuzhiyun 		   },
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun };
275*4882a593Smuzhiyun 
ppc4xx_msi_init(void)276*4882a593Smuzhiyun static __init int ppc4xx_msi_init(void)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	return platform_driver_register(&ppc4xx_msi_driver);
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun subsys_initcall(ppc4xx_msi_init);
282