xref: /OK3568_Linux_fs/kernel/arch/powerpc/platforms/44x/ppc476.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * PowerPC 476FPE board specific routines
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright © 2013 Tony Breeds IBM Corporation
6*4882a593Smuzhiyun  * Copyright © 2013 Alistair Popple IBM Corporation
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Based on earlier code:
9*4882a593Smuzhiyun  *    Matt Porter <mporter@kernel.crashing.org>
10*4882a593Smuzhiyun  *    Copyright 2002-2005 MontaVista Software Inc.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  *    Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
13*4882a593Smuzhiyun  *    Copyright (c) 2003-2005 Zultys Technologies
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  *    Rewritten and ported to the merged powerpc tree:
16*4882a593Smuzhiyun  *    Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
17*4882a593Smuzhiyun  *    Copyright © 2011 David Kliekamp IBM Corporation
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/init.h>
21*4882a593Smuzhiyun #include <linux/of.h>
22*4882a593Smuzhiyun #include <linux/of_platform.h>
23*4882a593Smuzhiyun #include <linux/rtc.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <asm/machdep.h>
26*4882a593Smuzhiyun #include <asm/prom.h>
27*4882a593Smuzhiyun #include <asm/udbg.h>
28*4882a593Smuzhiyun #include <asm/time.h>
29*4882a593Smuzhiyun #include <asm/uic.h>
30*4882a593Smuzhiyun #include <asm/ppc4xx.h>
31*4882a593Smuzhiyun #include <asm/mpic.h>
32*4882a593Smuzhiyun #include <asm/mmu.h>
33*4882a593Smuzhiyun #include <asm/swiotlb.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include <linux/pci.h>
36*4882a593Smuzhiyun #include <linux/i2c.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun static const struct of_device_id ppc47x_of_bus[] __initconst = {
39*4882a593Smuzhiyun 	{ .compatible = "ibm,plb4", },
40*4882a593Smuzhiyun 	{ .compatible = "ibm,plb6", },
41*4882a593Smuzhiyun 	{ .compatible = "ibm,opb", },
42*4882a593Smuzhiyun 	{ .compatible = "ibm,ebc", },
43*4882a593Smuzhiyun 	{},
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /* The EEPROM is missing and the default values are bogus.  This forces USB in
47*4882a593Smuzhiyun  * to EHCI mode */
quirk_ppc_currituck_usb_fixup(struct pci_dev * dev)48*4882a593Smuzhiyun static void quirk_ppc_currituck_usb_fixup(struct pci_dev *dev)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun 	if (of_machine_is_compatible("ibm,currituck")) {
51*4882a593Smuzhiyun 		pci_write_config_dword(dev, 0xe0, 0x0114231f);
52*4882a593Smuzhiyun 		pci_write_config_dword(dev, 0xe4, 0x00006c40);
53*4882a593Smuzhiyun 	}
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup);
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun /* Akebono has an AVR microcontroller attached to the I2C bus
58*4882a593Smuzhiyun  * which is used to power off/reset the system. */
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* AVR I2C Commands */
61*4882a593Smuzhiyun #define AVR_PWRCTL_CMD (0x26)
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /* Flags for the power control I2C commands */
64*4882a593Smuzhiyun #define AVR_PWRCTL_PWROFF (0x01)
65*4882a593Smuzhiyun #define AVR_PWRCTL_RESET (0x02)
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static struct i2c_client *avr_i2c_client;
avr_halt_system(int pwrctl_flags)68*4882a593Smuzhiyun static void __noreturn avr_halt_system(int pwrctl_flags)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	/* Request the AVR to reset the system */
71*4882a593Smuzhiyun 	i2c_smbus_write_byte_data(avr_i2c_client,
72*4882a593Smuzhiyun 				  AVR_PWRCTL_CMD, pwrctl_flags);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	/* Wait for system to be reset */
75*4882a593Smuzhiyun 	while (1)
76*4882a593Smuzhiyun 		;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
avr_power_off_system(void)79*4882a593Smuzhiyun static void avr_power_off_system(void)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	avr_halt_system(AVR_PWRCTL_PWROFF);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
avr_reset_system(char * cmd)84*4882a593Smuzhiyun static void __noreturn avr_reset_system(char *cmd)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	avr_halt_system(AVR_PWRCTL_RESET);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
avr_probe(struct i2c_client * client)89*4882a593Smuzhiyun static int avr_probe(struct i2c_client *client)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	avr_i2c_client = client;
92*4882a593Smuzhiyun 	ppc_md.restart = avr_reset_system;
93*4882a593Smuzhiyun 	pm_power_off = avr_power_off_system;
94*4882a593Smuzhiyun 	return 0;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun static const struct i2c_device_id avr_id[] = {
98*4882a593Smuzhiyun 	{ "akebono-avr", 0 },
99*4882a593Smuzhiyun 	{ }
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun static struct i2c_driver avr_driver = {
103*4882a593Smuzhiyun 	.driver = {
104*4882a593Smuzhiyun 		.name = "akebono-avr",
105*4882a593Smuzhiyun 	},
106*4882a593Smuzhiyun 	.probe_new = avr_probe,
107*4882a593Smuzhiyun 	.id_table = avr_id,
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
ppc47x_device_probe(void)110*4882a593Smuzhiyun static int __init ppc47x_device_probe(void)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	i2c_add_driver(&avr_driver);
113*4882a593Smuzhiyun 	of_platform_bus_probe(NULL, ppc47x_of_bus, NULL);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return 0;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun machine_device_initcall(ppc47x, ppc47x_device_probe);
118*4882a593Smuzhiyun 
ppc47x_init_irq(void)119*4882a593Smuzhiyun static void __init ppc47x_init_irq(void)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct device_node *np;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	/* Find top level interrupt controller */
124*4882a593Smuzhiyun 	for_each_node_with_property(np, "interrupt-controller") {
125*4882a593Smuzhiyun 		if (of_get_property(np, "interrupts", NULL) == NULL)
126*4882a593Smuzhiyun 			break;
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 	if (np == NULL)
129*4882a593Smuzhiyun 		panic("Can't find top level interrupt controller");
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	/* Check type and do appropriate initialization */
132*4882a593Smuzhiyun 	if (of_device_is_compatible(np, "chrp,open-pic")) {
133*4882a593Smuzhiyun 		/* The MPIC driver will get everything it needs from the
134*4882a593Smuzhiyun 		 * device-tree, just pass 0 to all arguments
135*4882a593Smuzhiyun 		 */
136*4882a593Smuzhiyun 		struct mpic *mpic =
137*4882a593Smuzhiyun 			mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC     ");
138*4882a593Smuzhiyun 		BUG_ON(mpic == NULL);
139*4882a593Smuzhiyun 		mpic_init(mpic);
140*4882a593Smuzhiyun 		ppc_md.get_irq = mpic_get_irq;
141*4882a593Smuzhiyun 	} else
142*4882a593Smuzhiyun 		panic("Unrecognized top level interrupt controller");
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #ifdef CONFIG_SMP
smp_ppc47x_setup_cpu(int cpu)146*4882a593Smuzhiyun static void smp_ppc47x_setup_cpu(int cpu)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	mpic_setup_this_cpu();
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
smp_ppc47x_kick_cpu(int cpu)151*4882a593Smuzhiyun static int smp_ppc47x_kick_cpu(int cpu)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
154*4882a593Smuzhiyun 	const u64 *spin_table_addr_prop;
155*4882a593Smuzhiyun 	u32 *spin_table;
156*4882a593Smuzhiyun 	extern void start_secondary_47x(void);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	BUG_ON(cpunode == NULL);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	/* Assume spin table. We could test for the enable-method in
161*4882a593Smuzhiyun 	 * the device-tree but currently there's little point as it's
162*4882a593Smuzhiyun 	 * our only supported method
163*4882a593Smuzhiyun 	 */
164*4882a593Smuzhiyun 	spin_table_addr_prop =
165*4882a593Smuzhiyun 		of_get_property(cpunode, "cpu-release-addr", NULL);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	if (spin_table_addr_prop == NULL) {
168*4882a593Smuzhiyun 		pr_err("CPU%d: Can't start, missing cpu-release-addr !\n",
169*4882a593Smuzhiyun 		       cpu);
170*4882a593Smuzhiyun 		return 1;
171*4882a593Smuzhiyun 	}
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	/* Assume it's mapped as part of the linear mapping. This is a bit
174*4882a593Smuzhiyun 	 * fishy but will work fine for now
175*4882a593Smuzhiyun 	 *
176*4882a593Smuzhiyun 	 * XXX: Is there any reason to assume differently?
177*4882a593Smuzhiyun 	 */
178*4882a593Smuzhiyun 	spin_table = (u32 *)__va(*spin_table_addr_prop);
179*4882a593Smuzhiyun 	pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	spin_table[3] = cpu;
182*4882a593Smuzhiyun 	smp_wmb();
183*4882a593Smuzhiyun 	spin_table[1] = __pa(start_secondary_47x);
184*4882a593Smuzhiyun 	mb();
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	return 0;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun static struct smp_ops_t ppc47x_smp_ops = {
190*4882a593Smuzhiyun 	.probe		= smp_mpic_probe,
191*4882a593Smuzhiyun 	.message_pass	= smp_mpic_message_pass,
192*4882a593Smuzhiyun 	.setup_cpu	= smp_ppc47x_setup_cpu,
193*4882a593Smuzhiyun 	.kick_cpu	= smp_ppc47x_kick_cpu,
194*4882a593Smuzhiyun 	.give_timebase	= smp_generic_give_timebase,
195*4882a593Smuzhiyun 	.take_timebase	= smp_generic_take_timebase,
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun 
ppc47x_smp_init(void)198*4882a593Smuzhiyun static void __init ppc47x_smp_init(void)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun 	if (mmu_has_feature(MMU_FTR_TYPE_47x))
201*4882a593Smuzhiyun 		smp_ops = &ppc47x_smp_ops;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun #else /* CONFIG_SMP */
ppc47x_smp_init(void)205*4882a593Smuzhiyun static void __init ppc47x_smp_init(void) { }
206*4882a593Smuzhiyun #endif /* CONFIG_SMP */
207*4882a593Smuzhiyun 
ppc47x_setup_arch(void)208*4882a593Smuzhiyun static void __init ppc47x_setup_arch(void)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	/* No need to check the DMA config as we /know/ our windows are all of
212*4882a593Smuzhiyun 	 * RAM.  Lets hope that doesn't change */
213*4882a593Smuzhiyun 	swiotlb_detect_4g();
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	ppc47x_smp_init();
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun static int board_rev = -1;
ppc47x_get_board_rev(void)219*4882a593Smuzhiyun static int __init ppc47x_get_board_rev(void)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	int reg;
222*4882a593Smuzhiyun 	u8 *fpga;
223*4882a593Smuzhiyun 	struct device_node *np = NULL;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	if (of_machine_is_compatible("ibm,currituck")) {
226*4882a593Smuzhiyun 		np = of_find_compatible_node(NULL, NULL, "ibm,currituck-fpga");
227*4882a593Smuzhiyun 		reg = 0;
228*4882a593Smuzhiyun 	} else if (of_machine_is_compatible("ibm,akebono")) {
229*4882a593Smuzhiyun 		np = of_find_compatible_node(NULL, NULL, "ibm,akebono-fpga");
230*4882a593Smuzhiyun 		reg = 2;
231*4882a593Smuzhiyun 	}
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	if (!np)
234*4882a593Smuzhiyun 		goto fail;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	fpga = (u8 *) of_iomap(np, 0);
237*4882a593Smuzhiyun 	of_node_put(np);
238*4882a593Smuzhiyun 	if (!fpga)
239*4882a593Smuzhiyun 		goto fail;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	board_rev = ioread8(fpga + reg) & 0x03;
242*4882a593Smuzhiyun 	pr_info("%s: Found board revision %d\n", __func__, board_rev);
243*4882a593Smuzhiyun 	iounmap(fpga);
244*4882a593Smuzhiyun 	return 0;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun fail:
247*4882a593Smuzhiyun 	pr_info("%s: Unable to find board revision\n", __func__);
248*4882a593Smuzhiyun 	return 0;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun machine_arch_initcall(ppc47x, ppc47x_get_board_rev);
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun /* Use USB controller should have been hardware swizzled but it wasn't :( */
ppc47x_pci_irq_fixup(struct pci_dev * dev)253*4882a593Smuzhiyun static void ppc47x_pci_irq_fixup(struct pci_dev *dev)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun 	if (dev->vendor == 0x1033 && (dev->device == 0x0035 ||
256*4882a593Smuzhiyun 				      dev->device == 0x00e0)) {
257*4882a593Smuzhiyun 		if (board_rev == 0) {
258*4882a593Smuzhiyun 			dev->irq = irq_create_mapping(NULL, 47);
259*4882a593Smuzhiyun 			pr_info("%s: Mapping irq %d\n", __func__, dev->irq);
260*4882a593Smuzhiyun 		} else if (board_rev == 2) {
261*4882a593Smuzhiyun 			dev->irq = irq_create_mapping(NULL, 49);
262*4882a593Smuzhiyun 			pr_info("%s: Mapping irq %d\n", __func__, dev->irq);
263*4882a593Smuzhiyun 		} else {
264*4882a593Smuzhiyun 			pr_alert("%s: Unknown board revision\n", __func__);
265*4882a593Smuzhiyun 		}
266*4882a593Smuzhiyun 	}
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun /*
270*4882a593Smuzhiyun  * Called very early, MMU is off, device-tree isn't unflattened
271*4882a593Smuzhiyun  */
ppc47x_probe(void)272*4882a593Smuzhiyun static int __init ppc47x_probe(void)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun 	if (of_machine_is_compatible("ibm,akebono"))
275*4882a593Smuzhiyun 		return 1;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	if (of_machine_is_compatible("ibm,currituck")) {
278*4882a593Smuzhiyun 		ppc_md.pci_irq_fixup = ppc47x_pci_irq_fixup;
279*4882a593Smuzhiyun 		return 1;
280*4882a593Smuzhiyun 	}
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	return 0;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun 
define_machine(ppc47x)285*4882a593Smuzhiyun define_machine(ppc47x) {
286*4882a593Smuzhiyun 	.name			= "PowerPC 47x",
287*4882a593Smuzhiyun 	.probe			= ppc47x_probe,
288*4882a593Smuzhiyun 	.progress		= udbg_progress,
289*4882a593Smuzhiyun 	.init_IRQ		= ppc47x_init_irq,
290*4882a593Smuzhiyun 	.setup_arch		= ppc47x_setup_arch,
291*4882a593Smuzhiyun 	.restart		= ppc4xx_reset_system,
292*4882a593Smuzhiyun 	.calibrate_decr		= generic_calibrate_decr,
293*4882a593Smuzhiyun };
294