xref: /OK3568_Linux_fs/kernel/arch/powerpc/platforms/44x/iss4xx.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * PPC476 board specific routines
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2010 Torez Smith, IBM Corporation.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on earlier code:
8*4882a593Smuzhiyun  *    Matt Porter <mporter@kernel.crashing.org>
9*4882a593Smuzhiyun  *    Copyright 2002-2005 MontaVista Software Inc.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  *    Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
12*4882a593Smuzhiyun  *    Copyright (c) 2003-2005 Zultys Technologies
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  *    Rewritten and ported to the merged powerpc tree:
15*4882a593Smuzhiyun  *    Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <linux/init.h>
19*4882a593Smuzhiyun #include <linux/of_platform.h>
20*4882a593Smuzhiyun #include <linux/rtc.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <asm/machdep.h>
23*4882a593Smuzhiyun #include <asm/prom.h>
24*4882a593Smuzhiyun #include <asm/udbg.h>
25*4882a593Smuzhiyun #include <asm/time.h>
26*4882a593Smuzhiyun #include <asm/uic.h>
27*4882a593Smuzhiyun #include <asm/ppc4xx.h>
28*4882a593Smuzhiyun #include <asm/mpic.h>
29*4882a593Smuzhiyun #include <asm/mmu.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static const struct of_device_id iss4xx_of_bus[] __initconst = {
32*4882a593Smuzhiyun 	{ .compatible = "ibm,plb4", },
33*4882a593Smuzhiyun 	{ .compatible = "ibm,plb6", },
34*4882a593Smuzhiyun 	{ .compatible = "ibm,opb", },
35*4882a593Smuzhiyun 	{ .compatible = "ibm,ebc", },
36*4882a593Smuzhiyun 	{},
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
iss4xx_device_probe(void)39*4882a593Smuzhiyun static int __init iss4xx_device_probe(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	of_platform_bus_probe(NULL, iss4xx_of_bus, NULL);
42*4882a593Smuzhiyun 	of_instantiate_rtc();
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	return 0;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun machine_device_initcall(iss4xx, iss4xx_device_probe);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /* We can have either UICs or MPICs */
iss4xx_init_irq(void)49*4882a593Smuzhiyun static void __init iss4xx_init_irq(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	struct device_node *np;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	/* Find top level interrupt controller */
54*4882a593Smuzhiyun 	for_each_node_with_property(np, "interrupt-controller") {
55*4882a593Smuzhiyun 		if (of_get_property(np, "interrupts", NULL) == NULL)
56*4882a593Smuzhiyun 			break;
57*4882a593Smuzhiyun 	}
58*4882a593Smuzhiyun 	if (np == NULL)
59*4882a593Smuzhiyun 		panic("Can't find top level interrupt controller");
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	/* Check type and do appropriate initialization */
62*4882a593Smuzhiyun 	if (of_device_is_compatible(np, "ibm,uic")) {
63*4882a593Smuzhiyun 		uic_init_tree();
64*4882a593Smuzhiyun 		ppc_md.get_irq = uic_get_irq;
65*4882a593Smuzhiyun #ifdef CONFIG_MPIC
66*4882a593Smuzhiyun 	} else if (of_device_is_compatible(np, "chrp,open-pic")) {
67*4882a593Smuzhiyun 		/* The MPIC driver will get everything it needs from the
68*4882a593Smuzhiyun 		 * device-tree, just pass 0 to all arguments
69*4882a593Smuzhiyun 		 */
70*4882a593Smuzhiyun 		struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC     ");
71*4882a593Smuzhiyun 		BUG_ON(mpic == NULL);
72*4882a593Smuzhiyun 		mpic_init(mpic);
73*4882a593Smuzhiyun 		ppc_md.get_irq = mpic_get_irq;
74*4882a593Smuzhiyun #endif
75*4882a593Smuzhiyun 	} else
76*4882a593Smuzhiyun 		panic("Unrecognized top level interrupt controller");
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #ifdef CONFIG_SMP
smp_iss4xx_setup_cpu(int cpu)80*4882a593Smuzhiyun static void smp_iss4xx_setup_cpu(int cpu)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	mpic_setup_this_cpu();
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun 
smp_iss4xx_kick_cpu(int cpu)85*4882a593Smuzhiyun static int smp_iss4xx_kick_cpu(int cpu)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun 	struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
88*4882a593Smuzhiyun 	const u64 *spin_table_addr_prop;
89*4882a593Smuzhiyun 	u32 *spin_table;
90*4882a593Smuzhiyun 	extern void start_secondary_47x(void);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	BUG_ON(cpunode == NULL);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	/* Assume spin table. We could test for the enable-method in
95*4882a593Smuzhiyun 	 * the device-tree but currently there's little point as it's
96*4882a593Smuzhiyun 	 * our only supported method
97*4882a593Smuzhiyun 	 */
98*4882a593Smuzhiyun 	spin_table_addr_prop = of_get_property(cpunode, "cpu-release-addr",
99*4882a593Smuzhiyun 					       NULL);
100*4882a593Smuzhiyun 	if (spin_table_addr_prop == NULL) {
101*4882a593Smuzhiyun 		pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu);
102*4882a593Smuzhiyun 		return -ENOENT;
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	/* Assume it's mapped as part of the linear mapping. This is a bit
106*4882a593Smuzhiyun 	 * fishy but will work fine for now
107*4882a593Smuzhiyun 	 */
108*4882a593Smuzhiyun 	spin_table = (u32 *)__va(*spin_table_addr_prop);
109*4882a593Smuzhiyun 	pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	spin_table[3] = cpu;
112*4882a593Smuzhiyun 	smp_wmb();
113*4882a593Smuzhiyun 	spin_table[1] = __pa(start_secondary_47x);
114*4882a593Smuzhiyun 	mb();
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	return 0;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun static struct smp_ops_t iss_smp_ops = {
120*4882a593Smuzhiyun 	.probe		= smp_mpic_probe,
121*4882a593Smuzhiyun 	.message_pass	= smp_mpic_message_pass,
122*4882a593Smuzhiyun 	.setup_cpu	= smp_iss4xx_setup_cpu,
123*4882a593Smuzhiyun 	.kick_cpu	= smp_iss4xx_kick_cpu,
124*4882a593Smuzhiyun 	.give_timebase	= smp_generic_give_timebase,
125*4882a593Smuzhiyun 	.take_timebase	= smp_generic_take_timebase,
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun 
iss4xx_smp_init(void)128*4882a593Smuzhiyun static void __init iss4xx_smp_init(void)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	if (mmu_has_feature(MMU_FTR_TYPE_47x))
131*4882a593Smuzhiyun 		smp_ops = &iss_smp_ops;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun #else /* CONFIG_SMP */
iss4xx_smp_init(void)135*4882a593Smuzhiyun static void __init iss4xx_smp_init(void) { }
136*4882a593Smuzhiyun #endif /* CONFIG_SMP */
137*4882a593Smuzhiyun 
iss4xx_setup_arch(void)138*4882a593Smuzhiyun static void __init iss4xx_setup_arch(void)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	iss4xx_smp_init();
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun /*
144*4882a593Smuzhiyun  * Called very early, MMU is off, device-tree isn't unflattened
145*4882a593Smuzhiyun  */
iss4xx_probe(void)146*4882a593Smuzhiyun static int __init iss4xx_probe(void)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	if (!of_machine_is_compatible("ibm,iss-4xx"))
149*4882a593Smuzhiyun 		return 0;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	return 1;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun 
define_machine(iss4xx)154*4882a593Smuzhiyun define_machine(iss4xx) {
155*4882a593Smuzhiyun 	.name			= "ISS-4xx",
156*4882a593Smuzhiyun 	.probe			= iss4xx_probe,
157*4882a593Smuzhiyun 	.progress		= udbg_progress,
158*4882a593Smuzhiyun 	.init_IRQ		= iss4xx_init_irq,
159*4882a593Smuzhiyun 	.setup_arch		= iss4xx_setup_arch,
160*4882a593Smuzhiyun 	.restart		= ppc4xx_reset_system,
161*4882a593Smuzhiyun 	.calibrate_decr		= generic_calibrate_decr,
162*4882a593Smuzhiyun };
163