1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * bpf_jit.h: BPF JIT compiler for PPC 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 6*4882a593Smuzhiyun * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef _BPF_JIT_H 9*4882a593Smuzhiyun #define _BPF_JIT_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <asm/types.h> 14*4882a593Smuzhiyun #include <asm/ppc-opcode.h> 15*4882a593Smuzhiyun #include <asm/code-patching.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifdef PPC64_ELF_ABI_v1 18*4882a593Smuzhiyun #define FUNCTION_DESCR_SIZE 24 19*4882a593Smuzhiyun #else 20*4882a593Smuzhiyun #define FUNCTION_DESCR_SIZE 0 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define PLANT_INSTR(d, idx, instr) \ 24*4882a593Smuzhiyun do { if (d) { (d)[idx] = instr; } idx++; } while (0) 25*4882a593Smuzhiyun #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* Long jump; (unconditional 'branch') */ 28*4882a593Smuzhiyun #define PPC_JMP(dest) \ 29*4882a593Smuzhiyun do { \ 30*4882a593Smuzhiyun long offset = (long)(dest) - (ctx->idx * 4); \ 31*4882a593Smuzhiyun if (!is_offset_in_branch_range(offset)) { \ 32*4882a593Smuzhiyun pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 33*4882a593Smuzhiyun return -ERANGE; \ 34*4882a593Smuzhiyun } \ 35*4882a593Smuzhiyun EMIT(PPC_INST_BRANCH | (offset & 0x03fffffc)); \ 36*4882a593Smuzhiyun } while (0) 37*4882a593Smuzhiyun /* "cond" here covers BO:BI fields. */ 38*4882a593Smuzhiyun #define PPC_BCC_SHORT(cond, dest) \ 39*4882a593Smuzhiyun do { \ 40*4882a593Smuzhiyun long offset = (long)(dest) - (ctx->idx * 4); \ 41*4882a593Smuzhiyun if (!is_offset_in_cond_branch_range(offset)) { \ 42*4882a593Smuzhiyun pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \ 43*4882a593Smuzhiyun return -ERANGE; \ 44*4882a593Smuzhiyun } \ 45*4882a593Smuzhiyun EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \ 46*4882a593Smuzhiyun } while (0) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Sign-extended 32-bit immediate load */ 49*4882a593Smuzhiyun #define PPC_LI32(d, i) do { \ 50*4882a593Smuzhiyun if ((int)(uintptr_t)(i) >= -32768 && \ 51*4882a593Smuzhiyun (int)(uintptr_t)(i) < 32768) \ 52*4882a593Smuzhiyun EMIT(PPC_RAW_LI(d, i)); \ 53*4882a593Smuzhiyun else { \ 54*4882a593Smuzhiyun EMIT(PPC_RAW_LIS(d, IMM_H(i))); \ 55*4882a593Smuzhiyun if (IMM_L(i)) \ 56*4882a593Smuzhiyun EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \ 57*4882a593Smuzhiyun } } while(0) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun #define PPC_LI64(d, i) do { \ 60*4882a593Smuzhiyun if ((long)(i) >= -2147483648 && \ 61*4882a593Smuzhiyun (long)(i) < 2147483648) \ 62*4882a593Smuzhiyun PPC_LI32(d, i); \ 63*4882a593Smuzhiyun else { \ 64*4882a593Smuzhiyun if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 65*4882a593Smuzhiyun EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \ 66*4882a593Smuzhiyun 0xffff)); \ 67*4882a593Smuzhiyun else { \ 68*4882a593Smuzhiyun EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \ 69*4882a593Smuzhiyun if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 70*4882a593Smuzhiyun EMIT(PPC_RAW_ORI(d, d, \ 71*4882a593Smuzhiyun ((uintptr_t)(i) >> 32) & 0xffff)); \ 72*4882a593Smuzhiyun } \ 73*4882a593Smuzhiyun EMIT(PPC_RAW_SLDI(d, d, 32)); \ 74*4882a593Smuzhiyun if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 75*4882a593Smuzhiyun EMIT(PPC_RAW_ORIS(d, d, \ 76*4882a593Smuzhiyun ((uintptr_t)(i) >> 16) & 0xffff)); \ 77*4882a593Smuzhiyun if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 78*4882a593Smuzhiyun EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \ 79*4882a593Smuzhiyun 0xffff)); \ 80*4882a593Smuzhiyun } } while (0) 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #ifdef CONFIG_PPC64 83*4882a593Smuzhiyun #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) 84*4882a593Smuzhiyun #else 85*4882a593Smuzhiyun #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* 89*4882a593Smuzhiyun * The fly in the ointment of code size changing from pass to pass is 90*4882a593Smuzhiyun * avoided by padding the short branch case with a NOP. If code size differs 91*4882a593Smuzhiyun * with different branch reaches we will have the issue of code moving from 92*4882a593Smuzhiyun * one pass to the next and will need a few passes to converge on a stable 93*4882a593Smuzhiyun * state. 94*4882a593Smuzhiyun */ 95*4882a593Smuzhiyun #define PPC_BCC(cond, dest) do { \ 96*4882a593Smuzhiyun if (is_offset_in_cond_branch_range((long)(dest) - (ctx->idx * 4))) { \ 97*4882a593Smuzhiyun PPC_BCC_SHORT(cond, dest); \ 98*4882a593Smuzhiyun EMIT(PPC_RAW_NOP()); \ 99*4882a593Smuzhiyun } else { \ 100*4882a593Smuzhiyun /* Flip the 'T or F' bit to invert comparison */ \ 101*4882a593Smuzhiyun PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 102*4882a593Smuzhiyun PPC_JMP(dest); \ 103*4882a593Smuzhiyun } } while(0) 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* To create a branch condition, select a bit of cr0... */ 106*4882a593Smuzhiyun #define CR0_LT 0 107*4882a593Smuzhiyun #define CR0_GT 1 108*4882a593Smuzhiyun #define CR0_EQ 2 109*4882a593Smuzhiyun /* ...and modify BO[3] */ 110*4882a593Smuzhiyun #define COND_CMP_TRUE 0x100 111*4882a593Smuzhiyun #define COND_CMP_FALSE 0x000 112*4882a593Smuzhiyun /* Together, they make all required comparisons: */ 113*4882a593Smuzhiyun #define COND_GT (CR0_GT | COND_CMP_TRUE) 114*4882a593Smuzhiyun #define COND_GE (CR0_LT | COND_CMP_FALSE) 115*4882a593Smuzhiyun #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 116*4882a593Smuzhiyun #define COND_NE (CR0_EQ | COND_CMP_FALSE) 117*4882a593Smuzhiyun #define COND_LT (CR0_LT | COND_CMP_TRUE) 118*4882a593Smuzhiyun #define COND_LE (CR0_GT | COND_CMP_FALSE) 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun #endif 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun #endif 123