xref: /OK3568_Linux_fs/kernel/arch/powerpc/mm/mmu_decl.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Declarations of procedures and variables shared between files
4*4882a593Smuzhiyun  * in arch/ppc/mm/.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *  Derived from arch/ppc/mm/init.c:
7*4882a593Smuzhiyun  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
10*4882a593Smuzhiyun  *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
11*4882a593Smuzhiyun  *    Copyright (C) 1996 Paul Mackerras
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  *  Derived from "arch/i386/mm/init.c"
14*4882a593Smuzhiyun  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun #include <linux/mm.h>
17*4882a593Smuzhiyun #include <asm/mmu.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #ifdef CONFIG_PPC_MMU_NOHASH
20*4882a593Smuzhiyun #include <asm/trace.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun  * On 40x and 8xx, we directly inline tlbia and tlbivax
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun #if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx)
_tlbil_all(void)26*4882a593Smuzhiyun static inline void _tlbil_all(void)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	asm volatile ("sync; tlbia; isync" : : : "memory");
29*4882a593Smuzhiyun 	trace_tlbia(MMU_NO_CONTEXT);
30*4882a593Smuzhiyun }
_tlbil_pid(unsigned int pid)31*4882a593Smuzhiyun static inline void _tlbil_pid(unsigned int pid)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	asm volatile ("sync; tlbia; isync" : : : "memory");
34*4882a593Smuzhiyun 	trace_tlbia(pid);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun #define _tlbil_pid_noind(pid)	_tlbil_pid(pid)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #else /* CONFIG_40x || CONFIG_PPC_8xx */
39*4882a593Smuzhiyun extern void _tlbil_all(void);
40*4882a593Smuzhiyun extern void _tlbil_pid(unsigned int pid);
41*4882a593Smuzhiyun #ifdef CONFIG_PPC_BOOK3E
42*4882a593Smuzhiyun extern void _tlbil_pid_noind(unsigned int pid);
43*4882a593Smuzhiyun #else
44*4882a593Smuzhiyun #define _tlbil_pid_noind(pid)	_tlbil_pid(pid)
45*4882a593Smuzhiyun #endif
46*4882a593Smuzhiyun #endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun  * On 8xx, we directly inline tlbie, on others, it's extern
50*4882a593Smuzhiyun  */
51*4882a593Smuzhiyun #ifdef CONFIG_PPC_8xx
_tlbil_va(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)52*4882a593Smuzhiyun static inline void _tlbil_va(unsigned long address, unsigned int pid,
53*4882a593Smuzhiyun 			     unsigned int tsize, unsigned int ind)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun 	asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
56*4882a593Smuzhiyun 	trace_tlbie(0, 0, address, pid, 0, 0, 0);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun #elif defined(CONFIG_PPC_BOOK3E)
59*4882a593Smuzhiyun extern void _tlbil_va(unsigned long address, unsigned int pid,
60*4882a593Smuzhiyun 		      unsigned int tsize, unsigned int ind);
61*4882a593Smuzhiyun #else
62*4882a593Smuzhiyun extern void __tlbil_va(unsigned long address, unsigned int pid);
_tlbil_va(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)63*4882a593Smuzhiyun static inline void _tlbil_va(unsigned long address, unsigned int pid,
64*4882a593Smuzhiyun 			     unsigned int tsize, unsigned int ind)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun 	__tlbil_va(address, pid);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun #endif /* CONFIG_PPC_8xx */
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x)
71*4882a593Smuzhiyun extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
72*4882a593Smuzhiyun 			   unsigned int tsize, unsigned int ind);
73*4882a593Smuzhiyun #else
_tlbivax_bcast(unsigned long address,unsigned int pid,unsigned int tsize,unsigned int ind)74*4882a593Smuzhiyun static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
75*4882a593Smuzhiyun 				   unsigned int tsize, unsigned int ind)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	BUG();
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun #endif
80*4882a593Smuzhiyun 
print_system_hash_info(void)81*4882a593Smuzhiyun static inline void print_system_hash_info(void) {}
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #else /* CONFIG_PPC_MMU_NOHASH */
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun extern void _tlbie(unsigned long address);
86*4882a593Smuzhiyun extern void _tlbia(void);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun void print_system_hash_info(void);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #endif /* CONFIG_PPC_MMU_NOHASH */
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #ifdef CONFIG_PPC32
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun void hash_preload(struct mm_struct *mm, unsigned long ea);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun extern void mapin_ram(void);
97*4882a593Smuzhiyun extern void setbat(int index, unsigned long virt, phys_addr_t phys,
98*4882a593Smuzhiyun 		   unsigned int size, pgprot_t prot);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun extern int __map_without_bats;
101*4882a593Smuzhiyun extern unsigned int rtas_data, rtas_size;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun struct hash_pte;
104*4882a593Smuzhiyun extern struct hash_pte *Hash;
105*4882a593Smuzhiyun extern u8 early_hash[];
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun #endif /* CONFIG_PPC32 */
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun extern unsigned long __max_low_memory;
110*4882a593Smuzhiyun extern phys_addr_t __initial_memory_limit_addr;
111*4882a593Smuzhiyun extern phys_addr_t total_memory;
112*4882a593Smuzhiyun extern phys_addr_t total_lowmem;
113*4882a593Smuzhiyun extern phys_addr_t memstart_addr;
114*4882a593Smuzhiyun extern phys_addr_t lowmem_end_addr;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun #ifdef CONFIG_WII
117*4882a593Smuzhiyun extern unsigned long wii_hole_start;
118*4882a593Smuzhiyun extern unsigned long wii_hole_size;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun extern unsigned long wii_mmu_mapin_mem2(unsigned long top);
121*4882a593Smuzhiyun extern void wii_memory_fixups(void);
122*4882a593Smuzhiyun #endif
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun /* ...and now those things that may be slightly different between processor
125*4882a593Smuzhiyun  * architectures.  -- Dan
126*4882a593Smuzhiyun  */
127*4882a593Smuzhiyun #ifdef CONFIG_PPC32
128*4882a593Smuzhiyun extern void MMU_init_hw(void);
129*4882a593Smuzhiyun void MMU_init_hw_patch(void);
130*4882a593Smuzhiyun unsigned long mmu_mapin_ram(unsigned long base, unsigned long top);
131*4882a593Smuzhiyun #endif
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun #ifdef CONFIG_PPC_FSL_BOOK3E
134*4882a593Smuzhiyun extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
135*4882a593Smuzhiyun 				     bool dryrun);
136*4882a593Smuzhiyun extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
137*4882a593Smuzhiyun 				 phys_addr_t phys);
138*4882a593Smuzhiyun #ifdef CONFIG_PPC32
139*4882a593Smuzhiyun extern void adjust_total_lowmem(void);
140*4882a593Smuzhiyun extern int switch_to_as1(void);
141*4882a593Smuzhiyun extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
142*4882a593Smuzhiyun void create_kaslr_tlb_entry(int entry, unsigned long virt, phys_addr_t phys);
143*4882a593Smuzhiyun void reloc_kernel_entry(void *fdt, int addr);
144*4882a593Smuzhiyun extern int is_second_reloc;
145*4882a593Smuzhiyun #endif
146*4882a593Smuzhiyun extern void loadcam_entry(unsigned int index);
147*4882a593Smuzhiyun extern void loadcam_multi(int first_idx, int num, int tmp_idx);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun #ifdef CONFIG_RANDOMIZE_BASE
150*4882a593Smuzhiyun void kaslr_early_init(void *dt_ptr, phys_addr_t size);
151*4882a593Smuzhiyun void kaslr_late_init(void);
152*4882a593Smuzhiyun #else
kaslr_early_init(void * dt_ptr,phys_addr_t size)153*4882a593Smuzhiyun static inline void kaslr_early_init(void *dt_ptr, phys_addr_t size) {}
kaslr_late_init(void)154*4882a593Smuzhiyun static inline void kaslr_late_init(void) {}
155*4882a593Smuzhiyun #endif
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun struct tlbcam {
158*4882a593Smuzhiyun 	u32	MAS0;
159*4882a593Smuzhiyun 	u32	MAS1;
160*4882a593Smuzhiyun 	unsigned long	MAS2;
161*4882a593Smuzhiyun 	u32	MAS3;
162*4882a593Smuzhiyun 	u32	MAS7;
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun #endif
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
167*4882a593Smuzhiyun /* 6xx have BATS */
168*4882a593Smuzhiyun /* FSL_BOOKE have TLBCAM */
169*4882a593Smuzhiyun /* 8xx have LTLB */
170*4882a593Smuzhiyun phys_addr_t v_block_mapped(unsigned long va);
171*4882a593Smuzhiyun unsigned long p_block_mapped(phys_addr_t pa);
172*4882a593Smuzhiyun #else
v_block_mapped(unsigned long va)173*4882a593Smuzhiyun static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
p_block_mapped(phys_addr_t pa)174*4882a593Smuzhiyun static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
175*4882a593Smuzhiyun #endif
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx)
178*4882a593Smuzhiyun void mmu_mark_initmem_nx(void);
179*4882a593Smuzhiyun void mmu_mark_rodata_ro(void);
180*4882a593Smuzhiyun #else
mmu_mark_initmem_nx(void)181*4882a593Smuzhiyun static inline void mmu_mark_initmem_nx(void) { }
mmu_mark_rodata_ro(void)182*4882a593Smuzhiyun static inline void mmu_mark_rodata_ro(void) { }
183*4882a593Smuzhiyun #endif
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun #ifdef CONFIG_PPC_8xx
186*4882a593Smuzhiyun void __init mmu_mapin_immr(void);
187*4882a593Smuzhiyun #endif
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun #ifdef CONFIG_PPC_DEBUG_WX
190*4882a593Smuzhiyun void ptdump_check_wx(void);
191*4882a593Smuzhiyun #else
ptdump_check_wx(void)192*4882a593Smuzhiyun static inline void ptdump_check_wx(void) { }
193*4882a593Smuzhiyun #endif
194