1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun #include <linux/types.h> 3*4882a593Smuzhiyun #include <linux/errno.h> 4*4882a593Smuzhiyun #include <linux/uaccess.h> 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #include <asm/sfp-machine.h> 7*4882a593Smuzhiyun #include <math-emu/soft-fp.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun int mtfsf(unsigned int FM,u32 * frB)10*4882a593Smuzhiyunmtfsf(unsigned int FM, u32 *frB) 11*4882a593Smuzhiyun { 12*4882a593Smuzhiyun u32 mask; 13*4882a593Smuzhiyun u32 fpscr; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun if (likely(FM == 1)) 16*4882a593Smuzhiyun mask = 0x0f; 17*4882a593Smuzhiyun else if (likely(FM == 0xff)) 18*4882a593Smuzhiyun mask = ~0; 19*4882a593Smuzhiyun else { 20*4882a593Smuzhiyun mask = ((FM & 1) | 21*4882a593Smuzhiyun ((FM << 3) & 0x10) | 22*4882a593Smuzhiyun ((FM << 6) & 0x100) | 23*4882a593Smuzhiyun ((FM << 9) & 0x1000) | 24*4882a593Smuzhiyun ((FM << 12) & 0x10000) | 25*4882a593Smuzhiyun ((FM << 15) & 0x100000) | 26*4882a593Smuzhiyun ((FM << 18) & 0x1000000) | 27*4882a593Smuzhiyun ((FM << 21) & 0x10000000)) * 15; 28*4882a593Smuzhiyun } 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun fpscr = ((__FPU_FPSCR & ~mask) | (frB[1] & mask)) & 31*4882a593Smuzhiyun ~(FPSCR_VX | FPSCR_FEX | 0x800); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | 34*4882a593Smuzhiyun FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC | 35*4882a593Smuzhiyun FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI)) 36*4882a593Smuzhiyun fpscr |= FPSCR_VX; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* The bit order of exception enables and exception status 39*4882a593Smuzhiyun * is the same. Simply shift and mask to check for enabled 40*4882a593Smuzhiyun * exceptions. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun if (fpscr & (fpscr >> 22) & 0xf8) 43*4882a593Smuzhiyun fpscr |= FPSCR_FEX; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun __FPU_FPSCR = fpscr; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #ifdef DEBUG 48*4882a593Smuzhiyun printk("%s: %02x %p: %08lx\n", __func__, FM, frB, __FPU_FPSCR); 49*4882a593Smuzhiyun #endif 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun return 0; 52*4882a593Smuzhiyun } 53