1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*4882a593Smuzhiyun #ifndef _ASM_POWERPC_AUXVEC_H 3*4882a593Smuzhiyun #define _ASM_POWERPC_AUXVEC_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* 6*4882a593Smuzhiyun * We need to put in some extra aux table entries to tell glibc what 7*4882a593Smuzhiyun * the cache block size is, so it can use the dcbz instruction safely. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun #define AT_DCACHEBSIZE 19 10*4882a593Smuzhiyun #define AT_ICACHEBSIZE 20 11*4882a593Smuzhiyun #define AT_UCACHEBSIZE 21 12*4882a593Smuzhiyun /* A special ignored type value for PPC, for glibc compatibility. */ 13*4882a593Smuzhiyun #define AT_IGNOREPPC 22 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* The vDSO location. We have to use the same value as x86 for glibc's 16*4882a593Smuzhiyun * sake :-) 17*4882a593Smuzhiyun */ 18*4882a593Smuzhiyun #define AT_SYSINFO_EHDR 33 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun * AT_*CACHEBSIZE above represent the cache *block* size which is 22*4882a593Smuzhiyun * the size that is affected by the cache management instructions. 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * It doesn't nececssarily matches the cache *line* size which is 25*4882a593Smuzhiyun * more of a performance tuning hint. Additionally the latter can 26*4882a593Smuzhiyun * be different for the different cache levels. 27*4882a593Smuzhiyun * 28*4882a593Smuzhiyun * The set of entries below represent more extensive information 29*4882a593Smuzhiyun * about the caches, in the form of two entry per cache type, 30*4882a593Smuzhiyun * one entry containing the cache size in bytes, and the other 31*4882a593Smuzhiyun * containing the cache line size in bytes in the bottom 16 bits 32*4882a593Smuzhiyun * and the cache associativity in the next 16 bits. 33*4882a593Smuzhiyun * 34*4882a593Smuzhiyun * The associativity is such that if N is the 16-bit value, the 35*4882a593Smuzhiyun * cache is N way set associative. A value if 0xffff means fully 36*4882a593Smuzhiyun * associative, a value of 1 means directly mapped. 37*4882a593Smuzhiyun * 38*4882a593Smuzhiyun * For all these fields, a value of 0 means that the information 39*4882a593Smuzhiyun * is not known. 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define AT_L1I_CACHESIZE 40 43*4882a593Smuzhiyun #define AT_L1I_CACHEGEOMETRY 41 44*4882a593Smuzhiyun #define AT_L1D_CACHESIZE 42 45*4882a593Smuzhiyun #define AT_L1D_CACHEGEOMETRY 43 46*4882a593Smuzhiyun #define AT_L2_CACHESIZE 44 47*4882a593Smuzhiyun #define AT_L2_CACHEGEOMETRY 45 48*4882a593Smuzhiyun #define AT_L3_CACHESIZE 46 49*4882a593Smuzhiyun #define AT_L3_CACHEGEOMETRY 47 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define AT_VECTOR_SIZE_ARCH 14 /* entries in ARCH_DLINFO */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #endif 54