1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2016-17 IBM Corp. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _ASM_POWERPC_VAS_H 7*4882a593Smuzhiyun #define _ASM_POWERPC_VAS_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun struct vas_window; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* 12*4882a593Smuzhiyun * Min and max FIFO sizes are based on Version 1.05 Section 3.1.4.25 13*4882a593Smuzhiyun * (Local FIFO Size Register) of the VAS workbook. 14*4882a593Smuzhiyun */ 15*4882a593Smuzhiyun #define VAS_RX_FIFO_SIZE_MIN (1 << 10) /* 1KB */ 16*4882a593Smuzhiyun #define VAS_RX_FIFO_SIZE_MAX (8 << 20) /* 8MB */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* 19*4882a593Smuzhiyun * Threshold Control Mode: Have paste operation fail if the number of 20*4882a593Smuzhiyun * requests in receive FIFO exceeds a threshold. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * NOTE: No special error code yet if paste is rejected because of these 23*4882a593Smuzhiyun * limits. So users can't distinguish between this and other errors. 24*4882a593Smuzhiyun */ 25*4882a593Smuzhiyun #define VAS_THRESH_DISABLED 0 26*4882a593Smuzhiyun #define VAS_THRESH_FIFO_GT_HALF_FULL 1 27*4882a593Smuzhiyun #define VAS_THRESH_FIFO_GT_QTR_FULL 2 28*4882a593Smuzhiyun #define VAS_THRESH_FIFO_GT_EIGHTH_FULL 3 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* 31*4882a593Smuzhiyun * Get/Set bit fields 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun #define GET_FIELD(m, v) (((v) & (m)) >> MASK_LSH(m)) 34*4882a593Smuzhiyun #define MASK_LSH(m) (__builtin_ffsl(m) - 1) 35*4882a593Smuzhiyun #define SET_FIELD(m, v, val) \ 36*4882a593Smuzhiyun (((v) & ~(m)) | ((((typeof(v))(val)) << MASK_LSH(m)) & (m))) 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* 39*4882a593Smuzhiyun * Co-processor Engine type. 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun enum vas_cop_type { 42*4882a593Smuzhiyun VAS_COP_TYPE_FAULT, 43*4882a593Smuzhiyun VAS_COP_TYPE_842, 44*4882a593Smuzhiyun VAS_COP_TYPE_842_HIPRI, 45*4882a593Smuzhiyun VAS_COP_TYPE_GZIP, 46*4882a593Smuzhiyun VAS_COP_TYPE_GZIP_HIPRI, 47*4882a593Smuzhiyun VAS_COP_TYPE_FTW, 48*4882a593Smuzhiyun VAS_COP_TYPE_MAX, 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* 52*4882a593Smuzhiyun * Receive window attributes specified by the (in-kernel) owner of window. 53*4882a593Smuzhiyun */ 54*4882a593Smuzhiyun struct vas_rx_win_attr { 55*4882a593Smuzhiyun u64 rx_fifo; 56*4882a593Smuzhiyun int rx_fifo_size; 57*4882a593Smuzhiyun int wcreds_max; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun bool pin_win; 60*4882a593Smuzhiyun bool rej_no_credit; 61*4882a593Smuzhiyun bool tx_wcred_mode; 62*4882a593Smuzhiyun bool rx_wcred_mode; 63*4882a593Smuzhiyun bool tx_win_ord_mode; 64*4882a593Smuzhiyun bool rx_win_ord_mode; 65*4882a593Smuzhiyun bool data_stamp; 66*4882a593Smuzhiyun bool nx_win; 67*4882a593Smuzhiyun bool fault_win; 68*4882a593Smuzhiyun bool user_win; 69*4882a593Smuzhiyun bool notify_disable; 70*4882a593Smuzhiyun bool intr_disable; 71*4882a593Smuzhiyun bool notify_early; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun int lnotify_lpid; 74*4882a593Smuzhiyun int lnotify_pid; 75*4882a593Smuzhiyun int lnotify_tid; 76*4882a593Smuzhiyun u32 pswid; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun int tc_mode; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* 82*4882a593Smuzhiyun * Window attributes specified by the in-kernel owner of a send window. 83*4882a593Smuzhiyun */ 84*4882a593Smuzhiyun struct vas_tx_win_attr { 85*4882a593Smuzhiyun enum vas_cop_type cop; 86*4882a593Smuzhiyun int wcreds_max; 87*4882a593Smuzhiyun int lpid; 88*4882a593Smuzhiyun int pidr; /* hardware PID (from SPRN_PID) */ 89*4882a593Smuzhiyun int pswid; 90*4882a593Smuzhiyun int rsvd_txbuf_count; 91*4882a593Smuzhiyun int tc_mode; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun bool user_win; 94*4882a593Smuzhiyun bool pin_win; 95*4882a593Smuzhiyun bool rej_no_credit; 96*4882a593Smuzhiyun bool rsvd_txbuf_enable; 97*4882a593Smuzhiyun bool tx_wcred_mode; 98*4882a593Smuzhiyun bool rx_wcred_mode; 99*4882a593Smuzhiyun bool tx_win_ord_mode; 100*4882a593Smuzhiyun bool rx_win_ord_mode; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /* 104*4882a593Smuzhiyun * Helper to map a chip id to VAS id. 105*4882a593Smuzhiyun * For POWER9, this is a 1:1 mapping. In the future this maybe a 1:N 106*4882a593Smuzhiyun * mapping in which case, we will need to update this helper. 107*4882a593Smuzhiyun * 108*4882a593Smuzhiyun * Return the VAS id or -1 if no matching vasid is found. 109*4882a593Smuzhiyun */ 110*4882a593Smuzhiyun int chip_to_vas_id(int chipid); 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* 113*4882a593Smuzhiyun * Helper to initialize receive window attributes to defaults for an 114*4882a593Smuzhiyun * NX window. 115*4882a593Smuzhiyun */ 116*4882a593Smuzhiyun void vas_init_rx_win_attr(struct vas_rx_win_attr *rxattr, enum vas_cop_type cop); 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun /* 119*4882a593Smuzhiyun * Open a VAS receive window for the instance of VAS identified by @vasid 120*4882a593Smuzhiyun * Use @attr to initialize the attributes of the window. 121*4882a593Smuzhiyun * 122*4882a593Smuzhiyun * Return a handle to the window or ERR_PTR() on error. 123*4882a593Smuzhiyun */ 124*4882a593Smuzhiyun struct vas_window *vas_rx_win_open(int vasid, enum vas_cop_type cop, 125*4882a593Smuzhiyun struct vas_rx_win_attr *attr); 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* 128*4882a593Smuzhiyun * Helper to initialize send window attributes to defaults for an NX window. 129*4882a593Smuzhiyun */ 130*4882a593Smuzhiyun extern void vas_init_tx_win_attr(struct vas_tx_win_attr *txattr, 131*4882a593Smuzhiyun enum vas_cop_type cop); 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* 134*4882a593Smuzhiyun * Open a VAS send window for the instance of VAS identified by @vasid 135*4882a593Smuzhiyun * and the co-processor type @cop. Use @attr to initialize attributes 136*4882a593Smuzhiyun * of the window. 137*4882a593Smuzhiyun * 138*4882a593Smuzhiyun * Note: The instance of VAS must already have an open receive window for 139*4882a593Smuzhiyun * the coprocessor type @cop. 140*4882a593Smuzhiyun * 141*4882a593Smuzhiyun * Return a handle to the send window or ERR_PTR() on error. 142*4882a593Smuzhiyun */ 143*4882a593Smuzhiyun struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop, 144*4882a593Smuzhiyun struct vas_tx_win_attr *attr); 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun /* 147*4882a593Smuzhiyun * Close the send or receive window identified by @win. For receive windows 148*4882a593Smuzhiyun * return -EAGAIN if there are active send windows attached to this receive 149*4882a593Smuzhiyun * window. 150*4882a593Smuzhiyun */ 151*4882a593Smuzhiyun int vas_win_close(struct vas_window *win); 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun /* 154*4882a593Smuzhiyun * Copy the co-processor request block (CRB) @crb into the local L2 cache. 155*4882a593Smuzhiyun */ 156*4882a593Smuzhiyun int vas_copy_crb(void *crb, int offset); 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun /* 159*4882a593Smuzhiyun * Paste a previously copied CRB (see vas_copy_crb()) from the L2 cache to 160*4882a593Smuzhiyun * the hardware address associated with the window @win. @re is expected/ 161*4882a593Smuzhiyun * assumed to be true for NX windows. 162*4882a593Smuzhiyun */ 163*4882a593Smuzhiyun int vas_paste_crb(struct vas_window *win, int offset, bool re); 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /* 166*4882a593Smuzhiyun * Register / unregister coprocessor type to VAS API which will be exported 167*4882a593Smuzhiyun * to user space. Applications can use this API to open / close window 168*4882a593Smuzhiyun * which can be used to send / receive requests directly to cooprcessor. 169*4882a593Smuzhiyun * 170*4882a593Smuzhiyun * Only NX GZIP coprocessor type is supported now, but this API can be 171*4882a593Smuzhiyun * used for others in future. 172*4882a593Smuzhiyun */ 173*4882a593Smuzhiyun int vas_register_coproc_api(struct module *mod, enum vas_cop_type cop_type, 174*4882a593Smuzhiyun const char *name); 175*4882a593Smuzhiyun void vas_unregister_coproc_api(void); 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun #endif /* __ASM_POWERPC_VAS_H */ 178