1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Ultravisor definitions
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2019, IBM Corporation.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #ifndef _ASM_POWERPC_ULTRAVISOR_H
9*4882a593Smuzhiyun #define _ASM_POWERPC_ULTRAVISOR_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <asm/asm-prototypes.h>
12*4882a593Smuzhiyun #include <asm/ultravisor-api.h>
13*4882a593Smuzhiyun #include <asm/firmware.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun int early_init_dt_scan_ultravisor(unsigned long node, const char *uname,
16*4882a593Smuzhiyun int depth, void *data);
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /*
19*4882a593Smuzhiyun * In ultravisor enabled systems, PTCR becomes ultravisor privileged only for
20*4882a593Smuzhiyun * writing and an attempt to write to it will cause a Hypervisor Emulation
21*4882a593Smuzhiyun * Assistance interrupt.
22*4882a593Smuzhiyun */
set_ptcr_when_no_uv(u64 val)23*4882a593Smuzhiyun static inline void set_ptcr_when_no_uv(u64 val)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR))
26*4882a593Smuzhiyun mtspr(SPRN_PTCR, val);
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
uv_register_pate(u64 lpid,u64 dw0,u64 dw1)29*4882a593Smuzhiyun static inline int uv_register_pate(u64 lpid, u64 dw0, u64 dw1)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun return ucall_norets(UV_WRITE_PATE, lpid, dw0, dw1);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
uv_share_page(u64 pfn,u64 npages)34*4882a593Smuzhiyun static inline int uv_share_page(u64 pfn, u64 npages)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun return ucall_norets(UV_SHARE_PAGE, pfn, npages);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
uv_unshare_page(u64 pfn,u64 npages)39*4882a593Smuzhiyun static inline int uv_unshare_page(u64 pfn, u64 npages)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun return ucall_norets(UV_UNSHARE_PAGE, pfn, npages);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
uv_unshare_all_pages(void)44*4882a593Smuzhiyun static inline int uv_unshare_all_pages(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun return ucall_norets(UV_UNSHARE_ALL_PAGES);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
uv_page_in(u64 lpid,u64 src_ra,u64 dst_gpa,u64 flags,u64 page_shift)49*4882a593Smuzhiyun static inline int uv_page_in(u64 lpid, u64 src_ra, u64 dst_gpa, u64 flags,
50*4882a593Smuzhiyun u64 page_shift)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun return ucall_norets(UV_PAGE_IN, lpid, src_ra, dst_gpa, flags,
53*4882a593Smuzhiyun page_shift);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
uv_page_out(u64 lpid,u64 dst_ra,u64 src_gpa,u64 flags,u64 page_shift)56*4882a593Smuzhiyun static inline int uv_page_out(u64 lpid, u64 dst_ra, u64 src_gpa, u64 flags,
57*4882a593Smuzhiyun u64 page_shift)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun return ucall_norets(UV_PAGE_OUT, lpid, dst_ra, src_gpa, flags,
60*4882a593Smuzhiyun page_shift);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
uv_register_mem_slot(u64 lpid,u64 start_gpa,u64 size,u64 flags,u64 slotid)63*4882a593Smuzhiyun static inline int uv_register_mem_slot(u64 lpid, u64 start_gpa, u64 size,
64*4882a593Smuzhiyun u64 flags, u64 slotid)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun return ucall_norets(UV_REGISTER_MEM_SLOT, lpid, start_gpa,
67*4882a593Smuzhiyun size, flags, slotid);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
uv_unregister_mem_slot(u64 lpid,u64 slotid)70*4882a593Smuzhiyun static inline int uv_unregister_mem_slot(u64 lpid, u64 slotid)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun return ucall_norets(UV_UNREGISTER_MEM_SLOT, lpid, slotid);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
uv_page_inval(u64 lpid,u64 gpa,u64 page_shift)75*4882a593Smuzhiyun static inline int uv_page_inval(u64 lpid, u64 gpa, u64 page_shift)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun return ucall_norets(UV_PAGE_INVAL, lpid, gpa, page_shift);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun
uv_svm_terminate(u64 lpid)80*4882a593Smuzhiyun static inline int uv_svm_terminate(u64 lpid)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun return ucall_norets(UV_SVM_TERMINATE, lpid);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #endif /* _ASM_POWERPC_ULTRAVISOR_H */
86