1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2007 IBM Corp 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _ASM_POWERPC_TSI108_PCI_H 7*4882a593Smuzhiyun #define _ASM_POWERPC_TSI108_PCI_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <asm/tsi108.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* Register definitions */ 12*4882a593Smuzhiyun #define TSI108_PCI_P2O_BAR0 (TSI108_PCI_OFFSET + 0x10) 13*4882a593Smuzhiyun #define TSI108_PCI_P2O_BAR0_UPPER (TSI108_PCI_OFFSET + 0x14) 14*4882a593Smuzhiyun #define TSI108_PCI_P2O_BAR2 (TSI108_PCI_OFFSET + 0x18) 15*4882a593Smuzhiyun #define TSI108_PCI_P2O_BAR2_UPPER (TSI108_PCI_OFFSET + 0x1c) 16*4882a593Smuzhiyun #define TSI108_PCI_P2O_PAGE_SIZES (TSI108_PCI_OFFSET + 0x4c) 17*4882a593Smuzhiyun #define TSI108_PCI_PFAB_BAR0 (TSI108_PCI_OFFSET + 0x204) 18*4882a593Smuzhiyun #define TSI108_PCI_PFAB_BAR0_UPPER (TSI108_PCI_OFFSET + 0x208) 19*4882a593Smuzhiyun #define TSI108_PCI_PFAB_IO (TSI108_PCI_OFFSET + 0x20c) 20*4882a593Smuzhiyun #define TSI108_PCI_PFAB_IO_UPPER (TSI108_PCI_OFFSET + 0x210) 21*4882a593Smuzhiyun #define TSI108_PCI_PFAB_MEM32 (TSI108_PCI_OFFSET + 0x214) 22*4882a593Smuzhiyun #define TSI108_PCI_PFAB_PFM3 (TSI108_PCI_OFFSET + 0x220) 23*4882a593Smuzhiyun #define TSI108_PCI_PFAB_PFM4 (TSI108_PCI_OFFSET + 0x230) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun extern int tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary); 26*4882a593Smuzhiyun extern void tsi108_pci_int_init(struct device_node *node); 27*4882a593Smuzhiyun extern void tsi108_irq_cascade(struct irq_desc *desc); 28*4882a593Smuzhiyun extern void tsi108_clear_pci_cfg_error(void); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #endif /* _ASM_POWERPC_TSI108_PCI_H */ 31