1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun #ifndef _ASM_POWERPC_PROBES_H 3*4882a593Smuzhiyun #define _ASM_POWERPC_PROBES_H 4*4882a593Smuzhiyun #ifdef __KERNEL__ 5*4882a593Smuzhiyun /* 6*4882a593Smuzhiyun * Definitions common to probes files 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright IBM Corporation, 2012 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun typedef u32 ppc_opcode_t; 13*4882a593Smuzhiyun #define BREAKPOINT_INSTRUCTION 0x7fe00008 /* trap */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* Trap definitions per ISA */ 16*4882a593Smuzhiyun #define IS_TW(instr) (((instr) & 0xfc0007fe) == 0x7c000008) 17*4882a593Smuzhiyun #define IS_TD(instr) (((instr) & 0xfc0007fe) == 0x7c000088) 18*4882a593Smuzhiyun #define IS_TDI(instr) (((instr) & 0xfc000000) == 0x08000000) 19*4882a593Smuzhiyun #define IS_TWI(instr) (((instr) & 0xfc000000) == 0x0c000000) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #ifdef CONFIG_PPC64 22*4882a593Smuzhiyun #define is_trap(instr) (IS_TW(instr) || IS_TD(instr) || \ 23*4882a593Smuzhiyun IS_TWI(instr) || IS_TDI(instr)) 24*4882a593Smuzhiyun #else 25*4882a593Smuzhiyun #define is_trap(instr) (IS_TW(instr) || IS_TWI(instr)) 26*4882a593Smuzhiyun #endif /* CONFIG_PPC64 */ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #ifdef CONFIG_PPC_ADV_DEBUG_REGS 29*4882a593Smuzhiyun #define MSR_SINGLESTEP (MSR_DE) 30*4882a593Smuzhiyun #else 31*4882a593Smuzhiyun #define MSR_SINGLESTEP (MSR_SE) 32*4882a593Smuzhiyun #endif 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* Enable single stepping for the current task */ enable_single_step(struct pt_regs * regs)35*4882a593Smuzhiyunstatic inline void enable_single_step(struct pt_regs *regs) 36*4882a593Smuzhiyun { 37*4882a593Smuzhiyun regs->msr |= MSR_SINGLESTEP; 38*4882a593Smuzhiyun #ifdef CONFIG_PPC_ADV_DEBUG_REGS 39*4882a593Smuzhiyun /* 40*4882a593Smuzhiyun * We turn off Critical Input Exception(CE) to ensure that the single 41*4882a593Smuzhiyun * step will be for the instruction we have the probe on; if we don't, 42*4882a593Smuzhiyun * it is possible we'd get the single step reported for CE. 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun regs->msr &= ~MSR_CE; 45*4882a593Smuzhiyun mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 46*4882a593Smuzhiyun #ifdef CONFIG_PPC_47x 47*4882a593Smuzhiyun isync(); 48*4882a593Smuzhiyun #endif 49*4882a593Smuzhiyun #endif 50*4882a593Smuzhiyun } 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #endif /* __KERNEL__ */ 54*4882a593Smuzhiyun #endif /* _ASM_POWERPC_PROBES_H */ 55