1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Definition of platform feature hooks for PowerMacs
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
5*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive
6*4882a593Smuzhiyun * for more details.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 1998 Paul Mackerras &
9*4882a593Smuzhiyun * Ben. Herrenschmidt.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Note: I removed media-bay details from the feature stuff, I believe it's
13*4882a593Smuzhiyun * not worth it, the media-bay driver can directly use the mac-io
14*4882a593Smuzhiyun * ASIC registers.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * Implementation note: Currently, none of these functions will block.
17*4882a593Smuzhiyun * However, they may internally protect themselves with a spinlock
18*4882a593Smuzhiyun * for way too long. Be prepared for at least some of these to block
19*4882a593Smuzhiyun * in the future.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * Unless specifically defined, the result code is assumed to be an
22*4882a593Smuzhiyun * error when negative, 0 is the default success result. Some functions
23*4882a593Smuzhiyun * may return additional positive result values.
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * To keep implementation simple, all feature calls are assumed to have
26*4882a593Smuzhiyun * the prototype parameters (struct device_node* node, int value).
27*4882a593Smuzhiyun * When either is not used, pass 0.
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #ifdef __KERNEL__
31*4882a593Smuzhiyun #ifndef __ASM_POWERPC_PMAC_FEATURE_H
32*4882a593Smuzhiyun #define __ASM_POWERPC_PMAC_FEATURE_H
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <asm/macio.h>
35*4882a593Smuzhiyun #include <asm/machdep.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun * Known Mac motherboard models
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * Please, report any error here to benh@kernel.crashing.org, thanks !
41*4882a593Smuzhiyun *
42*4882a593Smuzhiyun * Note that I don't fully maintain this list for Core99 & MacRISC2
43*4882a593Smuzhiyun * and I'm considering removing all NewWorld entries from it and
44*4882a593Smuzhiyun * entirely rely on the model string.
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* PowerSurge are the first generation of PCI Pmacs. This include
48*4882a593Smuzhiyun * all of the Grand-Central based machines. We currently don't
49*4882a593Smuzhiyun * differentiate most of them.
50*4882a593Smuzhiyun */
51*4882a593Smuzhiyun #define PMAC_TYPE_PSURGE 0x10 /* PowerSurge */
52*4882a593Smuzhiyun #define PMAC_TYPE_ANS 0x11 /* Apple Network Server */
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* Here is the infamous serie of OHare based machines
55*4882a593Smuzhiyun */
56*4882a593Smuzhiyun #define PMAC_TYPE_COMET 0x20 /* Believed to be PowerBook 2400 */
57*4882a593Smuzhiyun #define PMAC_TYPE_HOOPER 0x21 /* Believed to be PowerBook 3400 */
58*4882a593Smuzhiyun #define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */
59*4882a593Smuzhiyun #define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */
60*4882a593Smuzhiyun #define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */
61*4882a593Smuzhiyun #define PMAC_TYPE_UNKNOWN_OHARE 0x2f /* Unknown, but OHare based */
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* Here are the Heathrow based machines
64*4882a593Smuzhiyun * FIXME: Differenciate wallstreet,mainstreet,wallstreetII
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun #define PMAC_TYPE_GOSSAMER 0x30 /* Gossamer motherboard */
67*4882a593Smuzhiyun #define PMAC_TYPE_SILK 0x31 /* Desktop PowerMac G3 */
68*4882a593Smuzhiyun #define PMAC_TYPE_WALLSTREET 0x32 /* Wallstreet/Mainstreet PowerBook*/
69*4882a593Smuzhiyun #define PMAC_TYPE_UNKNOWN_HEATHROW 0x3f /* Unknown but heathrow based */
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* Here are newworld machines based on Paddington (heathrow derivative)
72*4882a593Smuzhiyun */
73*4882a593Smuzhiyun #define PMAC_TYPE_101_PBOOK 0x40 /* 101 PowerBook (aka Lombard) */
74*4882a593Smuzhiyun #define PMAC_TYPE_ORIG_IMAC 0x41 /* First generation iMac */
75*4882a593Smuzhiyun #define PMAC_TYPE_YOSEMITE 0x42 /* B&W G3 */
76*4882a593Smuzhiyun #define PMAC_TYPE_YIKES 0x43 /* Yikes G4 (PCI graphics) */
77*4882a593Smuzhiyun #define PMAC_TYPE_UNKNOWN_PADDINGTON 0x4f /* Unknown but paddington based */
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* Core99 machines based on UniNorth 1.0 and 1.5
80*4882a593Smuzhiyun *
81*4882a593Smuzhiyun * Note: A single entry here may cover several actual models according
82*4882a593Smuzhiyun * to the device-tree. (Sawtooth is most tower G4s, FW_IMAC is most
83*4882a593Smuzhiyun * FireWire based iMacs, etc...). Those machines are too similar to be
84*4882a593Smuzhiyun * distinguished here, when they need to be differencied, use the
85*4882a593Smuzhiyun * device-tree "model" or "compatible" property.
86*4882a593Smuzhiyun */
87*4882a593Smuzhiyun #define PMAC_TYPE_ORIG_IBOOK 0x40 /* First iBook model (no firewire) */
88*4882a593Smuzhiyun #define PMAC_TYPE_SAWTOOTH 0x41 /* Desktop G4s */
89*4882a593Smuzhiyun #define PMAC_TYPE_FW_IMAC 0x42 /* FireWire iMacs (except Pangea based) */
90*4882a593Smuzhiyun #define PMAC_TYPE_FW_IBOOK 0x43 /* FireWire iBooks (except iBook2) */
91*4882a593Smuzhiyun #define PMAC_TYPE_CUBE 0x44 /* Cube PowerMac */
92*4882a593Smuzhiyun #define PMAC_TYPE_QUICKSILVER 0x45 /* QuickSilver G4s */
93*4882a593Smuzhiyun #define PMAC_TYPE_PISMO 0x46 /* Pismo PowerBook */
94*4882a593Smuzhiyun #define PMAC_TYPE_TITANIUM 0x47 /* Titanium PowerBook */
95*4882a593Smuzhiyun #define PMAC_TYPE_TITANIUM2 0x48 /* Titanium II PowerBook (no L3, M6) */
96*4882a593Smuzhiyun #define PMAC_TYPE_TITANIUM3 0x49 /* Titanium III PowerBook (with L3 & M7) */
97*4882a593Smuzhiyun #define PMAC_TYPE_TITANIUM4 0x50 /* Titanium IV PowerBook (with L3 & M9) */
98*4882a593Smuzhiyun #define PMAC_TYPE_EMAC 0x50 /* eMac */
99*4882a593Smuzhiyun #define PMAC_TYPE_UNKNOWN_CORE99 0x5f
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /* MacRisc2 with UniNorth 2.0 */
102*4882a593Smuzhiyun #define PMAC_TYPE_RACKMAC 0x80 /* XServe */
103*4882a593Smuzhiyun #define PMAC_TYPE_WINDTUNNEL 0x81
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* MacRISC2 machines based on the Pangea chipset
106*4882a593Smuzhiyun */
107*4882a593Smuzhiyun #define PMAC_TYPE_PANGEA_IMAC 0x100 /* Flower Power iMac */
108*4882a593Smuzhiyun #define PMAC_TYPE_IBOOK2 0x101 /* iBook2 (polycarbonate) */
109*4882a593Smuzhiyun #define PMAC_TYPE_FLAT_PANEL_IMAC 0x102 /* Flat panel iMac */
110*4882a593Smuzhiyun #define PMAC_TYPE_UNKNOWN_PANGEA 0x10f
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* MacRISC2 machines based on the Intrepid chipset
113*4882a593Smuzhiyun */
114*4882a593Smuzhiyun #define PMAC_TYPE_UNKNOWN_INTREPID 0x11f /* Generic */
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* MacRISC4 / G5 machines. We don't have per-machine selection here anymore,
117*4882a593Smuzhiyun * but rather machine families
118*4882a593Smuzhiyun */
119*4882a593Smuzhiyun #define PMAC_TYPE_POWERMAC_G5 0x150 /* U3 & U3H based */
120*4882a593Smuzhiyun #define PMAC_TYPE_POWERMAC_G5_U3L 0x151 /* U3L based desktop */
121*4882a593Smuzhiyun #define PMAC_TYPE_IMAC_G5 0x152 /* iMac G5 */
122*4882a593Smuzhiyun #define PMAC_TYPE_XSERVE_G5 0x153 /* Xserve G5 */
123*4882a593Smuzhiyun #define PMAC_TYPE_UNKNOWN_K2 0x19f /* Any other K2 based */
124*4882a593Smuzhiyun #define PMAC_TYPE_UNKNOWN_SHASTA 0x19e /* Any other Shasta based */
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /*
127*4882a593Smuzhiyun * Motherboard flags
128*4882a593Smuzhiyun */
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun #define PMAC_MB_CAN_SLEEP 0x00000001
131*4882a593Smuzhiyun #define PMAC_MB_HAS_FW_POWER 0x00000002
132*4882a593Smuzhiyun #define PMAC_MB_OLD_CORE99 0x00000004
133*4882a593Smuzhiyun #define PMAC_MB_MOBILE 0x00000008
134*4882a593Smuzhiyun #define PMAC_MB_MAY_SLEEP 0x00000010
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /*
137*4882a593Smuzhiyun * Feature calls supported on pmac
138*4882a593Smuzhiyun *
139*4882a593Smuzhiyun */
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun * Use this inline wrapper
143*4882a593Smuzhiyun */
144*4882a593Smuzhiyun struct device_node;
145*4882a593Smuzhiyun
pmac_call_feature(int selector,struct device_node * node,long param,long value)146*4882a593Smuzhiyun static inline long pmac_call_feature(int selector, struct device_node* node,
147*4882a593Smuzhiyun long param, long value)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun if (!ppc_md.feature_call || !machine_is(powermac))
150*4882a593Smuzhiyun return -ENODEV;
151*4882a593Smuzhiyun return ppc_md.feature_call(selector, node, param, value);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun /* PMAC_FTR_SERIAL_ENABLE (struct device_node* node, int param, int value)
155*4882a593Smuzhiyun * enable/disable an SCC side. Pass the node corresponding to the
156*4882a593Smuzhiyun * channel side as a parameter.
157*4882a593Smuzhiyun * param is the type of port
158*4882a593Smuzhiyun * if param is ored with PMAC_SCC_FLAG_XMON, then the SCC is locked enabled
159*4882a593Smuzhiyun * for use by xmon.
160*4882a593Smuzhiyun */
161*4882a593Smuzhiyun #define PMAC_FTR_SCC_ENABLE PMAC_FTR_DEF(0)
162*4882a593Smuzhiyun #define PMAC_SCC_ASYNC 0
163*4882a593Smuzhiyun #define PMAC_SCC_IRDA 1
164*4882a593Smuzhiyun #define PMAC_SCC_I2S1 2
165*4882a593Smuzhiyun #define PMAC_SCC_FLAG_XMON 0x00001000
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* PMAC_FTR_MODEM_ENABLE (struct device_node* node, 0, int value)
168*4882a593Smuzhiyun * enable/disable the internal modem.
169*4882a593Smuzhiyun */
170*4882a593Smuzhiyun #define PMAC_FTR_MODEM_ENABLE PMAC_FTR_DEF(1)
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun /* PMAC_FTR_SWIM3_ENABLE (struct device_node* node, 0,int value)
173*4882a593Smuzhiyun * enable/disable the swim3 (floppy) cell of a mac-io ASIC
174*4882a593Smuzhiyun */
175*4882a593Smuzhiyun #define PMAC_FTR_SWIM3_ENABLE PMAC_FTR_DEF(2)
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun /* PMAC_FTR_MESH_ENABLE (struct device_node* node, 0, int value)
178*4882a593Smuzhiyun * enable/disable the mesh (scsi) cell of a mac-io ASIC
179*4882a593Smuzhiyun */
180*4882a593Smuzhiyun #define PMAC_FTR_MESH_ENABLE PMAC_FTR_DEF(3)
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /* PMAC_FTR_IDE_ENABLE (struct device_node* node, int busID, int value)
183*4882a593Smuzhiyun * enable/disable an IDE port of a mac-io ASIC
184*4882a593Smuzhiyun * pass the busID parameter
185*4882a593Smuzhiyun */
186*4882a593Smuzhiyun #define PMAC_FTR_IDE_ENABLE PMAC_FTR_DEF(4)
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun /* PMAC_FTR_IDE_RESET (struct device_node* node, int busID, int value)
189*4882a593Smuzhiyun * assert(1)/release(0) an IDE reset line (mac-io IDE only)
190*4882a593Smuzhiyun */
191*4882a593Smuzhiyun #define PMAC_FTR_IDE_RESET PMAC_FTR_DEF(5)
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /* PMAC_FTR_BMAC_ENABLE (struct device_node* node, 0, int value)
194*4882a593Smuzhiyun * enable/disable the bmac (ethernet) cell of a mac-io ASIC, also drive
195*4882a593Smuzhiyun * it's reset line
196*4882a593Smuzhiyun */
197*4882a593Smuzhiyun #define PMAC_FTR_BMAC_ENABLE PMAC_FTR_DEF(6)
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* PMAC_FTR_GMAC_ENABLE (struct device_node* node, 0, int value)
200*4882a593Smuzhiyun * enable/disable the gmac (ethernet) cell of an uninorth ASIC. This
201*4882a593Smuzhiyun * control the cell's clock.
202*4882a593Smuzhiyun */
203*4882a593Smuzhiyun #define PMAC_FTR_GMAC_ENABLE PMAC_FTR_DEF(7)
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /* PMAC_FTR_GMAC_PHY_RESET (struct device_node* node, 0, 0)
206*4882a593Smuzhiyun * Perform a HW reset of the PHY connected to a gmac controller.
207*4882a593Smuzhiyun * Pass the gmac device node, not the PHY node.
208*4882a593Smuzhiyun */
209*4882a593Smuzhiyun #define PMAC_FTR_GMAC_PHY_RESET PMAC_FTR_DEF(8)
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun /* PMAC_FTR_SOUND_CHIP_ENABLE (struct device_node* node, 0, int value)
212*4882a593Smuzhiyun * enable/disable the sound chip, whatever it is and provided it can
213*4882a593Smuzhiyun * actually be controlled
214*4882a593Smuzhiyun */
215*4882a593Smuzhiyun #define PMAC_FTR_SOUND_CHIP_ENABLE PMAC_FTR_DEF(9)
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun /* -- add various tweaks related to sound routing -- */
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* PMAC_FTR_AIRPORT_ENABLE (struct device_node* node, 0, int value)
220*4882a593Smuzhiyun * enable/disable the airport card
221*4882a593Smuzhiyun */
222*4882a593Smuzhiyun #define PMAC_FTR_AIRPORT_ENABLE PMAC_FTR_DEF(10)
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /* PMAC_FTR_RESET_CPU (NULL, int cpu_nr, 0)
225*4882a593Smuzhiyun * toggle the reset line of a CPU on an uninorth-based SMP machine
226*4882a593Smuzhiyun */
227*4882a593Smuzhiyun #define PMAC_FTR_RESET_CPU PMAC_FTR_DEF(11)
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /* PMAC_FTR_USB_ENABLE (struct device_node* node, 0, int value)
230*4882a593Smuzhiyun * enable/disable an USB cell, along with the power of the USB "pad"
231*4882a593Smuzhiyun * on keylargo based machines
232*4882a593Smuzhiyun */
233*4882a593Smuzhiyun #define PMAC_FTR_USB_ENABLE PMAC_FTR_DEF(12)
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /* PMAC_FTR_1394_ENABLE (struct device_node* node, 0, int value)
236*4882a593Smuzhiyun * enable/disable the firewire cell of an uninorth ASIC.
237*4882a593Smuzhiyun */
238*4882a593Smuzhiyun #define PMAC_FTR_1394_ENABLE PMAC_FTR_DEF(13)
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun /* PMAC_FTR_1394_CABLE_POWER (struct device_node* node, 0, int value)
241*4882a593Smuzhiyun * enable/disable the firewire cable power supply of the uninorth
242*4882a593Smuzhiyun * firewire cell
243*4882a593Smuzhiyun */
244*4882a593Smuzhiyun #define PMAC_FTR_1394_CABLE_POWER PMAC_FTR_DEF(14)
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun /* PMAC_FTR_SLEEP_STATE (struct device_node* node, 0, int value)
247*4882a593Smuzhiyun * set the sleep state of the motherboard.
248*4882a593Smuzhiyun *
249*4882a593Smuzhiyun * Pass -1 as value to query for sleep capability
250*4882a593Smuzhiyun * Pass 1 to set IOs to sleep
251*4882a593Smuzhiyun * Pass 0 to set IOs to wake
252*4882a593Smuzhiyun */
253*4882a593Smuzhiyun #define PMAC_FTR_SLEEP_STATE PMAC_FTR_DEF(15)
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* PMAC_FTR_GET_MB_INFO (NULL, selector, 0)
256*4882a593Smuzhiyun *
257*4882a593Smuzhiyun * returns some motherboard infos.
258*4882a593Smuzhiyun * selector: 0 - model id
259*4882a593Smuzhiyun * 1 - model flags (capabilities)
260*4882a593Smuzhiyun * 2 - model name (cast to const char *)
261*4882a593Smuzhiyun */
262*4882a593Smuzhiyun #define PMAC_FTR_GET_MB_INFO PMAC_FTR_DEF(16)
263*4882a593Smuzhiyun #define PMAC_MB_INFO_MODEL 0
264*4882a593Smuzhiyun #define PMAC_MB_INFO_FLAGS 1
265*4882a593Smuzhiyun #define PMAC_MB_INFO_NAME 2
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /* PMAC_FTR_READ_GPIO (NULL, int index, 0)
268*4882a593Smuzhiyun *
269*4882a593Smuzhiyun * read a GPIO from a mac-io controller of type KeyLargo or Pangea.
270*4882a593Smuzhiyun * the value returned is a byte (positive), or a negative error code
271*4882a593Smuzhiyun */
272*4882a593Smuzhiyun #define PMAC_FTR_READ_GPIO PMAC_FTR_DEF(17)
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /* PMAC_FTR_WRITE_GPIO (NULL, int index, int value)
275*4882a593Smuzhiyun *
276*4882a593Smuzhiyun * write a GPIO of a mac-io controller of type KeyLargo or Pangea.
277*4882a593Smuzhiyun */
278*4882a593Smuzhiyun #define PMAC_FTR_WRITE_GPIO PMAC_FTR_DEF(18)
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun /* PMAC_FTR_ENABLE_MPIC
281*4882a593Smuzhiyun *
282*4882a593Smuzhiyun * Enable the MPIC cell
283*4882a593Smuzhiyun */
284*4882a593Smuzhiyun #define PMAC_FTR_ENABLE_MPIC PMAC_FTR_DEF(19)
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun /* PMAC_FTR_AACK_DELAY_ENABLE (NULL, int enable, 0)
287*4882a593Smuzhiyun *
288*4882a593Smuzhiyun * Enable/disable the AACK delay on the northbridge for systems using DFS
289*4882a593Smuzhiyun */
290*4882a593Smuzhiyun #define PMAC_FTR_AACK_DELAY_ENABLE PMAC_FTR_DEF(20)
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /* PMAC_FTR_DEVICE_CAN_WAKE
293*4882a593Smuzhiyun *
294*4882a593Smuzhiyun * Used by video drivers to inform system that they can actually perform
295*4882a593Smuzhiyun * wakeup from sleep
296*4882a593Smuzhiyun */
297*4882a593Smuzhiyun #define PMAC_FTR_DEVICE_CAN_WAKE PMAC_FTR_DEF(22)
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun /* Don't use those directly, they are for the sake of pmac_setup.c */
301*4882a593Smuzhiyun extern long pmac_do_feature_call(unsigned int selector, ...);
302*4882a593Smuzhiyun extern void pmac_feature_init(void);
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun /* Video suspend tweak */
305*4882a593Smuzhiyun extern void pmac_set_early_video_resume(void (*proc)(void *data), void *data);
306*4882a593Smuzhiyun extern void pmac_call_early_video_resume(void);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun #define PMAC_FTR_DEF(x) ((0x6660000) | (x))
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun /* The AGP driver registers itself here */
311*4882a593Smuzhiyun extern void pmac_register_agp_pm(struct pci_dev *bridge,
312*4882a593Smuzhiyun int (*suspend)(struct pci_dev *bridge),
313*4882a593Smuzhiyun int (*resume)(struct pci_dev *bridge));
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun /* Those are meant to be used by video drivers to deal with AGP
316*4882a593Smuzhiyun * suspend resume properly
317*4882a593Smuzhiyun */
318*4882a593Smuzhiyun extern void pmac_suspend_agp_for_card(struct pci_dev *dev);
319*4882a593Smuzhiyun extern void pmac_resume_agp_for_card(struct pci_dev *dev);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /*
322*4882a593Smuzhiyun * The part below is for use by macio_asic.c only, do not rely
323*4882a593Smuzhiyun * on the data structures or constants below in a normal driver
324*4882a593Smuzhiyun *
325*4882a593Smuzhiyun */
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun #define MAX_MACIO_CHIPS 2
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun enum {
330*4882a593Smuzhiyun macio_unknown = 0,
331*4882a593Smuzhiyun macio_grand_central,
332*4882a593Smuzhiyun macio_ohare,
333*4882a593Smuzhiyun macio_ohareII,
334*4882a593Smuzhiyun macio_heathrow,
335*4882a593Smuzhiyun macio_gatwick,
336*4882a593Smuzhiyun macio_paddington,
337*4882a593Smuzhiyun macio_keylargo,
338*4882a593Smuzhiyun macio_pangea,
339*4882a593Smuzhiyun macio_intrepid,
340*4882a593Smuzhiyun macio_keylargo2,
341*4882a593Smuzhiyun macio_shasta,
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun struct macio_chip
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun struct device_node *of_node;
347*4882a593Smuzhiyun int type;
348*4882a593Smuzhiyun const char *name;
349*4882a593Smuzhiyun int rev;
350*4882a593Smuzhiyun volatile u32 __iomem *base;
351*4882a593Smuzhiyun unsigned long flags;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun /* For use by macio_asic PCI driver */
354*4882a593Smuzhiyun struct macio_bus lbus;
355*4882a593Smuzhiyun };
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun extern struct macio_chip macio_chips[MAX_MACIO_CHIPS];
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun #define MACIO_FLAG_SCCA_ON 0x00000001
360*4882a593Smuzhiyun #define MACIO_FLAG_SCCB_ON 0x00000002
361*4882a593Smuzhiyun #define MACIO_FLAG_SCC_LOCKED 0x00000004
362*4882a593Smuzhiyun #define MACIO_FLAG_AIRPORT_ON 0x00000010
363*4882a593Smuzhiyun #define MACIO_FLAG_FW_SUPPORTED 0x00000020
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun extern struct macio_chip* macio_find(struct device_node* child, int type);
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun #define MACIO_FCR32(macio, r) ((macio)->base + ((r) >> 2))
368*4882a593Smuzhiyun #define MACIO_FCR8(macio, r) (((volatile u8 __iomem *)((macio)->base)) + (r))
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun #define MACIO_IN32(r) (in_le32(MACIO_FCR32(macio,r)))
371*4882a593Smuzhiyun #define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v)))
372*4882a593Smuzhiyun #define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v)))
373*4882a593Smuzhiyun #define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v)))
374*4882a593Smuzhiyun #define MACIO_IN8(r) (in_8(MACIO_FCR8(macio,r)))
375*4882a593Smuzhiyun #define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v)))
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /*
378*4882a593Smuzhiyun * Those are exported by pmac feature for internal use by arch code
379*4882a593Smuzhiyun * only like the platform function callbacks, do not use directly in drivers
380*4882a593Smuzhiyun */
381*4882a593Smuzhiyun extern raw_spinlock_t feature_lock;
382*4882a593Smuzhiyun extern struct device_node *uninorth_node;
383*4882a593Smuzhiyun extern u32 __iomem *uninorth_base;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun /*
386*4882a593Smuzhiyun * Uninorth reg. access. Note that Uni-N regs are big endian
387*4882a593Smuzhiyun */
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun #define UN_REG(r) (uninorth_base + ((r) >> 2))
390*4882a593Smuzhiyun #define UN_IN(r) (in_be32(UN_REG(r)))
391*4882a593Smuzhiyun #define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
392*4882a593Smuzhiyun #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
393*4882a593Smuzhiyun #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun /* Uninorth variant:
396*4882a593Smuzhiyun *
397*4882a593Smuzhiyun * 0 = not uninorth
398*4882a593Smuzhiyun * 1 = U1.x or U2.x
399*4882a593Smuzhiyun * 3 = U3
400*4882a593Smuzhiyun * 4 = U4
401*4882a593Smuzhiyun */
402*4882a593Smuzhiyun extern int pmac_get_uninorth_variant(void);
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun #endif /* __ASM_POWERPC_PMAC_FEATURE_H */
405*4882a593Smuzhiyun #endif /* __KERNEL__ */
406