1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Performance event support - hardware-specific disambiguation 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * For now this is a compile-time decision, but eventually it should be 6*4882a593Smuzhiyun * runtime. This would allow multiplatform perf event support for e300 (fsl 7*4882a593Smuzhiyun * embedded perf counters) plus server/classic, and would accommodate 8*4882a593Smuzhiyun * devices other than the core which provide their own performance counters. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Copyright 2010 Freescale Semiconductor, Inc. 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifdef CONFIG_PPC_PERF_CTRS 14*4882a593Smuzhiyun #include <asm/perf_event_server.h> 15*4882a593Smuzhiyun #else is_sier_available(void)16*4882a593Smuzhiyunstatic inline bool is_sier_available(void) { return false; } 17*4882a593Smuzhiyun #endif 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #ifdef CONFIG_FSL_EMB_PERF_EVENT 20*4882a593Smuzhiyun #include <asm/perf_event_fsl_emb.h> 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifdef CONFIG_PERF_EVENTS 24*4882a593Smuzhiyun #include <asm/ptrace.h> 25*4882a593Smuzhiyun #include <asm/reg.h> 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define perf_arch_bpf_user_pt_regs(regs) ®s->user_regs 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* 30*4882a593Smuzhiyun * Overload regs->result to specify whether we should use the MSR (result 31*4882a593Smuzhiyun * is zero) or the SIAR (result is non zero). 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun #define perf_arch_fetch_caller_regs(regs, __ip) \ 34*4882a593Smuzhiyun do { \ 35*4882a593Smuzhiyun (regs)->result = 0; \ 36*4882a593Smuzhiyun (regs)->nip = __ip; \ 37*4882a593Smuzhiyun (regs)->gpr[1] = current_stack_frame(); \ 38*4882a593Smuzhiyun asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \ 39*4882a593Smuzhiyun } while (0) 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* To support perf_regs sier update */ 42*4882a593Smuzhiyun extern bool is_sier_available(void); 43*4882a593Smuzhiyun /* To define perf extended regs mask value */ 44*4882a593Smuzhiyun extern u64 PERF_REG_EXTENDED_MASK; 45*4882a593Smuzhiyun #define PERF_REG_EXTENDED_MASK PERF_REG_EXTENDED_MASK 46*4882a593Smuzhiyun #endif 47