1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ISA_BRIDGE_H 3*4882a593Smuzhiyun #define __ISA_BRIDGE_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifdef CONFIG_PPC64 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun extern void isa_bridge_find_early(struct pci_controller *hose); 8*4882a593Smuzhiyun extern void isa_bridge_init_non_pci(struct device_node *np); 9*4882a593Smuzhiyun isa_vaddr_is_ioport(void __iomem * address)10*4882a593Smuzhiyunstatic inline int isa_vaddr_is_ioport(void __iomem *address) 11*4882a593Smuzhiyun { 12*4882a593Smuzhiyun /* Check if address hits the reserved legacy IO range */ 13*4882a593Smuzhiyun unsigned long ea = (unsigned long)address; 14*4882a593Smuzhiyun return ea >= ISA_IO_BASE && ea < ISA_IO_END; 15*4882a593Smuzhiyun } 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #else 18*4882a593Smuzhiyun isa_vaddr_is_ioport(void __iomem * address)19*4882a593Smuzhiyunstatic inline int isa_vaddr_is_ioport(void __iomem *address) 20*4882a593Smuzhiyun { 21*4882a593Smuzhiyun /* No specific ISA handling on ppc32 at this stage, it 22*4882a593Smuzhiyun * all goes through PCI 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun return 0; 25*4882a593Smuzhiyun } 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #endif 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #endif /* __ISA_BRIDGE_H */ 30*4882a593Smuzhiyun 31