xref: /OK3568_Linux_fs/kernel/arch/powerpc/include/asm/futex.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _ASM_POWERPC_FUTEX_H
3*4882a593Smuzhiyun #define _ASM_POWERPC_FUTEX_H
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #ifdef __KERNEL__
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/futex.h>
8*4882a593Smuzhiyun #include <linux/uaccess.h>
9*4882a593Smuzhiyun #include <asm/errno.h>
10*4882a593Smuzhiyun #include <asm/synch.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
13*4882a593Smuzhiyun   __asm__ __volatile ( \
14*4882a593Smuzhiyun 	PPC_ATOMIC_ENTRY_BARRIER \
15*4882a593Smuzhiyun "1:	lwarx	%0,0,%2\n" \
16*4882a593Smuzhiyun 	insn \
17*4882a593Smuzhiyun "2:	stwcx.	%1,0,%2\n" \
18*4882a593Smuzhiyun 	"bne-	1b\n" \
19*4882a593Smuzhiyun 	PPC_ATOMIC_EXIT_BARRIER \
20*4882a593Smuzhiyun 	"li	%1,0\n" \
21*4882a593Smuzhiyun "3:	.section .fixup,\"ax\"\n" \
22*4882a593Smuzhiyun "4:	li	%1,%3\n" \
23*4882a593Smuzhiyun 	"b	3b\n" \
24*4882a593Smuzhiyun 	".previous\n" \
25*4882a593Smuzhiyun 	EX_TABLE(1b, 4b) \
26*4882a593Smuzhiyun 	EX_TABLE(2b, 4b) \
27*4882a593Smuzhiyun 	: "=&r" (oldval), "=&r" (ret) \
28*4882a593Smuzhiyun 	: "b" (uaddr), "i" (-EFAULT), "r" (oparg) \
29*4882a593Smuzhiyun 	: "cr0", "memory")
30*4882a593Smuzhiyun 
arch_futex_atomic_op_inuser(int op,int oparg,int * oval,u32 __user * uaddr)31*4882a593Smuzhiyun static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
32*4882a593Smuzhiyun 		u32 __user *uaddr)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	int oldval = 0, ret;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	if (!access_ok(uaddr, sizeof(u32)))
37*4882a593Smuzhiyun 		return -EFAULT;
38*4882a593Smuzhiyun 	allow_read_write_user(uaddr, uaddr, sizeof(*uaddr));
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	switch (op) {
41*4882a593Smuzhiyun 	case FUTEX_OP_SET:
42*4882a593Smuzhiyun 		__futex_atomic_op("mr %1,%4\n", ret, oldval, uaddr, oparg);
43*4882a593Smuzhiyun 		break;
44*4882a593Smuzhiyun 	case FUTEX_OP_ADD:
45*4882a593Smuzhiyun 		__futex_atomic_op("add %1,%0,%4\n", ret, oldval, uaddr, oparg);
46*4882a593Smuzhiyun 		break;
47*4882a593Smuzhiyun 	case FUTEX_OP_OR:
48*4882a593Smuzhiyun 		__futex_atomic_op("or %1,%0,%4\n", ret, oldval, uaddr, oparg);
49*4882a593Smuzhiyun 		break;
50*4882a593Smuzhiyun 	case FUTEX_OP_ANDN:
51*4882a593Smuzhiyun 		__futex_atomic_op("andc %1,%0,%4\n", ret, oldval, uaddr, oparg);
52*4882a593Smuzhiyun 		break;
53*4882a593Smuzhiyun 	case FUTEX_OP_XOR:
54*4882a593Smuzhiyun 		__futex_atomic_op("xor %1,%0,%4\n", ret, oldval, uaddr, oparg);
55*4882a593Smuzhiyun 		break;
56*4882a593Smuzhiyun 	default:
57*4882a593Smuzhiyun 		ret = -ENOSYS;
58*4882a593Smuzhiyun 	}
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	*oval = oldval;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	prevent_read_write_user(uaddr, uaddr, sizeof(*uaddr));
63*4882a593Smuzhiyun 	return ret;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun static inline int
futex_atomic_cmpxchg_inatomic(u32 * uval,u32 __user * uaddr,u32 oldval,u32 newval)67*4882a593Smuzhiyun futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
68*4882a593Smuzhiyun 			      u32 oldval, u32 newval)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	int ret = 0;
71*4882a593Smuzhiyun 	u32 prev;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	if (!access_ok(uaddr, sizeof(u32)))
74*4882a593Smuzhiyun 		return -EFAULT;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	allow_read_write_user(uaddr, uaddr, sizeof(*uaddr));
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun         __asm__ __volatile__ (
79*4882a593Smuzhiyun         PPC_ATOMIC_ENTRY_BARRIER
80*4882a593Smuzhiyun "1:     lwarx   %1,0,%3         # futex_atomic_cmpxchg_inatomic\n\
81*4882a593Smuzhiyun         cmpw    0,%1,%4\n\
82*4882a593Smuzhiyun         bne-    3f\n"
83*4882a593Smuzhiyun "2:     stwcx.  %5,0,%3\n\
84*4882a593Smuzhiyun         bne-    1b\n"
85*4882a593Smuzhiyun         PPC_ATOMIC_EXIT_BARRIER
86*4882a593Smuzhiyun "3:	.section .fixup,\"ax\"\n\
87*4882a593Smuzhiyun 4:	li	%0,%6\n\
88*4882a593Smuzhiyun 	b	3b\n\
89*4882a593Smuzhiyun 	.previous\n"
90*4882a593Smuzhiyun 	EX_TABLE(1b, 4b)
91*4882a593Smuzhiyun 	EX_TABLE(2b, 4b)
92*4882a593Smuzhiyun         : "+r" (ret), "=&r" (prev), "+m" (*uaddr)
93*4882a593Smuzhiyun         : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT)
94*4882a593Smuzhiyun         : "cc", "memory");
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	*uval = prev;
97*4882a593Smuzhiyun 	prevent_read_write_user(uaddr, uaddr, sizeof(*uaddr));
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun         return ret;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun #endif /* __KERNEL__ */
103*4882a593Smuzhiyun #endif /* _ASM_POWERPC_FUTEX_H */
104