1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * drmem.h: Power specific logical memory block representation
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2017 IBM Corporation
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef _ASM_POWERPC_LMB_H
9*4882a593Smuzhiyun #define _ASM_POWERPC_LMB_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/sched.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun struct drmem_lmb {
14*4882a593Smuzhiyun u64 base_addr;
15*4882a593Smuzhiyun u32 drc_index;
16*4882a593Smuzhiyun u32 aa_index;
17*4882a593Smuzhiyun u32 flags;
18*4882a593Smuzhiyun };
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun struct drmem_lmb_info {
21*4882a593Smuzhiyun struct drmem_lmb *lmbs;
22*4882a593Smuzhiyun int n_lmbs;
23*4882a593Smuzhiyun u64 lmb_size;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun extern struct drmem_lmb_info *drmem_info;
27*4882a593Smuzhiyun
drmem_lmb_next(struct drmem_lmb * lmb,const struct drmem_lmb * start)28*4882a593Smuzhiyun static inline struct drmem_lmb *drmem_lmb_next(struct drmem_lmb *lmb,
29*4882a593Smuzhiyun const struct drmem_lmb *start)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * DLPAR code paths can take several milliseconds per element
33*4882a593Smuzhiyun * when interacting with firmware. Ensure that we don't
34*4882a593Smuzhiyun * unfairly monopolize the CPU.
35*4882a593Smuzhiyun */
36*4882a593Smuzhiyun if (((++lmb - start) % 16) == 0)
37*4882a593Smuzhiyun cond_resched();
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun return lmb;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define for_each_drmem_lmb_in_range(lmb, start, end) \
43*4882a593Smuzhiyun for ((lmb) = (start); (lmb) < (end); lmb = drmem_lmb_next(lmb, start))
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define for_each_drmem_lmb(lmb) \
46*4882a593Smuzhiyun for_each_drmem_lmb_in_range((lmb), \
47*4882a593Smuzhiyun &drmem_info->lmbs[0], \
48*4882a593Smuzhiyun &drmem_info->lmbs[drmem_info->n_lmbs])
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun * The of_drconf_cell_v1 struct defines the layout of the LMB data
52*4882a593Smuzhiyun * specified in the ibm,dynamic-memory device tree property.
53*4882a593Smuzhiyun * The property itself is a 32-bit value specifying the number of
54*4882a593Smuzhiyun * LMBs followed by an array of of_drconf_cell_v1 entries, one
55*4882a593Smuzhiyun * per LMB.
56*4882a593Smuzhiyun */
57*4882a593Smuzhiyun struct of_drconf_cell_v1 {
58*4882a593Smuzhiyun __be64 base_addr;
59*4882a593Smuzhiyun __be32 drc_index;
60*4882a593Smuzhiyun __be32 reserved;
61*4882a593Smuzhiyun __be32 aa_index;
62*4882a593Smuzhiyun __be32 flags;
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /*
66*4882a593Smuzhiyun * Version 2 of the ibm,dynamic-memory property is defined as a
67*4882a593Smuzhiyun * 32-bit value specifying the number of LMB sets followed by an
68*4882a593Smuzhiyun * array of of_drconf_cell_v2 entries, one per LMB set.
69*4882a593Smuzhiyun */
70*4882a593Smuzhiyun struct of_drconf_cell_v2 {
71*4882a593Smuzhiyun u32 seq_lmbs;
72*4882a593Smuzhiyun u64 base_addr;
73*4882a593Smuzhiyun u32 drc_index;
74*4882a593Smuzhiyun u32 aa_index;
75*4882a593Smuzhiyun u32 flags;
76*4882a593Smuzhiyun } __packed;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun #define DRCONF_MEM_ASSIGNED 0x00000008
79*4882a593Smuzhiyun #define DRCONF_MEM_AI_INVALID 0x00000040
80*4882a593Smuzhiyun #define DRCONF_MEM_RESERVED 0x00000080
81*4882a593Smuzhiyun #define DRCONF_MEM_HOTREMOVABLE 0x00000100
82*4882a593Smuzhiyun
drmem_lmb_size(void)83*4882a593Smuzhiyun static inline u64 drmem_lmb_size(void)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun return drmem_info->lmb_size;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun #define DRMEM_LMB_RESERVED 0x80000000
89*4882a593Smuzhiyun
drmem_mark_lmb_reserved(struct drmem_lmb * lmb)90*4882a593Smuzhiyun static inline void drmem_mark_lmb_reserved(struct drmem_lmb *lmb)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun lmb->flags |= DRMEM_LMB_RESERVED;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
drmem_remove_lmb_reservation(struct drmem_lmb * lmb)95*4882a593Smuzhiyun static inline void drmem_remove_lmb_reservation(struct drmem_lmb *lmb)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun lmb->flags &= ~DRMEM_LMB_RESERVED;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
drmem_lmb_reserved(struct drmem_lmb * lmb)100*4882a593Smuzhiyun static inline bool drmem_lmb_reserved(struct drmem_lmb *lmb)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun return lmb->flags & DRMEM_LMB_RESERVED;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun u64 drmem_lmb_memory_max(void);
106*4882a593Smuzhiyun int walk_drmem_lmbs(struct device_node *dn, void *data,
107*4882a593Smuzhiyun int (*func)(struct drmem_lmb *, const __be32 **, void *));
108*4882a593Smuzhiyun int drmem_update_dt(void);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun #ifdef CONFIG_PPC_PSERIES
111*4882a593Smuzhiyun int __init
112*4882a593Smuzhiyun walk_drmem_lmbs_early(unsigned long node, void *data,
113*4882a593Smuzhiyun int (*func)(struct drmem_lmb *, const __be32 **, void *));
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun
invalidate_lmb_associativity_index(struct drmem_lmb * lmb)116*4882a593Smuzhiyun static inline void invalidate_lmb_associativity_index(struct drmem_lmb *lmb)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun lmb->aa_index = 0xffffffff;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun #endif /* _ASM_POWERPC_LMB_H */
122