1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. 4*4882a593Smuzhiyun * <benh@kernel.crashing.org> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _ASM_POWERPC_DCR_H 8*4882a593Smuzhiyun #define _ASM_POWERPC_DCR_H 9*4882a593Smuzhiyun #ifdef __KERNEL__ 10*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 11*4882a593Smuzhiyun #ifdef CONFIG_PPC_DCR 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifdef CONFIG_PPC_DCR_NATIVE 14*4882a593Smuzhiyun #include <asm/dcr-native.h> 15*4882a593Smuzhiyun #endif 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #ifdef CONFIG_PPC_DCR_MMIO 18*4882a593Smuzhiyun #include <asm/dcr-mmio.h> 19*4882a593Smuzhiyun #endif 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* Indirection layer for providing both NATIVE and MMIO support. */ 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #include <asm/dcr-generic.h> 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define DCR_MAP_OK(host) dcr_map_ok_generic(host) 29*4882a593Smuzhiyun #define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c) 30*4882a593Smuzhiyun #define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c) 31*4882a593Smuzhiyun #define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n) 32*4882a593Smuzhiyun #define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #else 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #ifdef CONFIG_PPC_DCR_NATIVE 37*4882a593Smuzhiyun typedef dcr_host_native_t dcr_host_t; 38*4882a593Smuzhiyun #define DCR_MAP_OK(host) dcr_map_ok_native(host) 39*4882a593Smuzhiyun #define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c) 40*4882a593Smuzhiyun #define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c) 41*4882a593Smuzhiyun #define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n) 42*4882a593Smuzhiyun #define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value) 43*4882a593Smuzhiyun #else 44*4882a593Smuzhiyun typedef dcr_host_mmio_t dcr_host_t; 45*4882a593Smuzhiyun #define DCR_MAP_OK(host) dcr_map_ok_mmio(host) 46*4882a593Smuzhiyun #define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c) 47*4882a593Smuzhiyun #define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c) 48*4882a593Smuzhiyun #define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n) 49*4882a593Smuzhiyun #define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value) 50*4882a593Smuzhiyun #endif 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */ 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* 55*4882a593Smuzhiyun * additional helpers to read the DCR * base from the device-tree 56*4882a593Smuzhiyun */ 57*4882a593Smuzhiyun struct device_node; 58*4882a593Smuzhiyun extern unsigned int dcr_resource_start(const struct device_node *np, 59*4882a593Smuzhiyun unsigned int index); 60*4882a593Smuzhiyun extern unsigned int dcr_resource_len(const struct device_node *np, 61*4882a593Smuzhiyun unsigned int index); 62*4882a593Smuzhiyun #endif /* CONFIG_PPC_DCR */ 63*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 64*4882a593Smuzhiyun #endif /* __KERNEL__ */ 65*4882a593Smuzhiyun #endif /* _ASM_POWERPC_DCR_H */ 66