1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _ASM_POWERPC_BOOK3S_32_HASH_H 3*4882a593Smuzhiyun #define _ASM_POWERPC_BOOK3S_32_HASH_H 4*4882a593Smuzhiyun #ifdef __KERNEL__ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun /* 7*4882a593Smuzhiyun * The "classic" 32-bit implementation of the PowerPC MMU uses a hash 8*4882a593Smuzhiyun * table containing PTEs, together with a set of 16 segment registers, 9*4882a593Smuzhiyun * to define the virtual to physical address mapping. 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * We use the hash table as an extended TLB, i.e. a cache of currently 12*4882a593Smuzhiyun * active mappings. We maintain a two-level page table tree, much 13*4882a593Smuzhiyun * like that used by the i386, for the sake of the Linux memory 14*4882a593Smuzhiyun * management code. Low-level assembler code in hash_low_32.S 15*4882a593Smuzhiyun * (procedure hash_page) is responsible for extracting ptes from the 16*4882a593Smuzhiyun * tree and putting them into the hash table when necessary, and 17*4882a593Smuzhiyun * updating the accessed and modified bits in the page table tree. 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define _PAGE_PRESENT 0x001 /* software: pte contains a translation */ 21*4882a593Smuzhiyun #define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */ 22*4882a593Smuzhiyun #define _PAGE_USER 0x004 /* usermode access allowed */ 23*4882a593Smuzhiyun #define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */ 24*4882a593Smuzhiyun #define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */ 25*4882a593Smuzhiyun #define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */ 26*4882a593Smuzhiyun #define _PAGE_WRITETHRU 0x040 /* W: cache write-through */ 27*4882a593Smuzhiyun #define _PAGE_DIRTY 0x080 /* C: page changed */ 28*4882a593Smuzhiyun #define _PAGE_ACCESSED 0x100 /* R: page referenced */ 29*4882a593Smuzhiyun #define _PAGE_EXEC 0x200 /* software: exec allowed */ 30*4882a593Smuzhiyun #define _PAGE_RW 0x400 /* software: user write access allowed */ 31*4882a593Smuzhiyun #define _PAGE_SPECIAL 0x800 /* software: Special page */ 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #ifdef CONFIG_PTE_64BIT 34*4882a593Smuzhiyun /* We never clear the high word of the pte */ 35*4882a593Smuzhiyun #define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE) 36*4882a593Smuzhiyun #else 37*4882a593Smuzhiyun #define _PTE_NONE_MASK _PAGE_HASHPTE 38*4882a593Smuzhiyun #endif 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define _PMD_PRESENT 0 41*4882a593Smuzhiyun #define _PMD_PRESENT_MASK (PAGE_MASK) 42*4882a593Smuzhiyun #define _PMD_BAD (~PAGE_MASK) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #endif /* __KERNEL__ */ 45*4882a593Smuzhiyun #endif /* _ASM_POWERPC_BOOK3S_32_HASH_H */ 46