1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * arch/powerpc/boot/wii-head.S 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Nintendo Wii bootwrapper entry. 6*4882a593Smuzhiyun * Copyright (C) 2008-2009 The GameCube Linux Team 7*4882a593Smuzhiyun * Copyright (C) 2008,2009 Albert Herranz 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "ppc_asm.h" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/* 13*4882a593Smuzhiyun * The entry code does no assumptions regarding: 14*4882a593Smuzhiyun * - if the data and instruction caches are enabled or not 15*4882a593Smuzhiyun * - if the MMU is enabled or not 16*4882a593Smuzhiyun * - if the high BATs are enabled or not 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * We enable the high BATs, enable the caches if not already enabled, 19*4882a593Smuzhiyun * enable the MMU with an identity mapping scheme and jump to the start code. 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun .text 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun .globl _zimage_start 25*4882a593Smuzhiyun_zimage_start: 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* turn the MMU off */ 28*4882a593Smuzhiyun mfmsr 9 29*4882a593Smuzhiyun rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */ 30*4882a593Smuzhiyun bcl 20, 31, 1f 31*4882a593Smuzhiyun1: 32*4882a593Smuzhiyun mflr 8 33*4882a593Smuzhiyun clrlwi 8, 8, 3 /* convert to a real address */ 34*4882a593Smuzhiyun addi 8, 8, _mmu_off - 1b 35*4882a593Smuzhiyun mtsrr0 8 36*4882a593Smuzhiyun mtsrr1 9 37*4882a593Smuzhiyun rfi 38*4882a593Smuzhiyun_mmu_off: 39*4882a593Smuzhiyun /* MMU disabled */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* setup BATs */ 42*4882a593Smuzhiyun isync 43*4882a593Smuzhiyun li 8, 0 44*4882a593Smuzhiyun mtspr 0x210, 8 /* IBAT0U */ 45*4882a593Smuzhiyun mtspr 0x212, 8 /* IBAT1U */ 46*4882a593Smuzhiyun mtspr 0x214, 8 /* IBAT2U */ 47*4882a593Smuzhiyun mtspr 0x216, 8 /* IBAT3U */ 48*4882a593Smuzhiyun mtspr 0x218, 8 /* DBAT0U */ 49*4882a593Smuzhiyun mtspr 0x21a, 8 /* DBAT1U */ 50*4882a593Smuzhiyun mtspr 0x21c, 8 /* DBAT2U */ 51*4882a593Smuzhiyun mtspr 0x21e, 8 /* DBAT3U */ 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun mtspr 0x230, 8 /* IBAT4U */ 54*4882a593Smuzhiyun mtspr 0x232, 8 /* IBAT5U */ 55*4882a593Smuzhiyun mtspr 0x234, 8 /* IBAT6U */ 56*4882a593Smuzhiyun mtspr 0x236, 8 /* IBAT7U */ 57*4882a593Smuzhiyun mtspr 0x238, 8 /* DBAT4U */ 58*4882a593Smuzhiyun mtspr 0x23a, 8 /* DBAT5U */ 59*4882a593Smuzhiyun mtspr 0x23c, 8 /* DBAT6U */ 60*4882a593Smuzhiyun mtspr 0x23e, 8 /* DBAT7U */ 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun li 8, 0x01ff /* first 16MiB */ 63*4882a593Smuzhiyun li 9, 0x0002 /* rw */ 64*4882a593Smuzhiyun mtspr 0x211, 9 /* IBAT0L */ 65*4882a593Smuzhiyun mtspr 0x210, 8 /* IBAT0U */ 66*4882a593Smuzhiyun mtspr 0x219, 9 /* DBAT0L */ 67*4882a593Smuzhiyun mtspr 0x218, 8 /* DBAT0U */ 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun lis 8, 0x0c00 /* I/O mem */ 70*4882a593Smuzhiyun ori 8, 8, 0x3ff /* 32MiB */ 71*4882a593Smuzhiyun lis 9, 0x0c00 72*4882a593Smuzhiyun ori 9, 9, 0x002a /* uncached, guarded, rw */ 73*4882a593Smuzhiyun mtspr 0x21b, 9 /* DBAT1L */ 74*4882a593Smuzhiyun mtspr 0x21a, 8 /* DBAT1U */ 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun lis 8, 0x0100 /* next 8MiB */ 77*4882a593Smuzhiyun ori 8, 8, 0x00ff /* 8MiB */ 78*4882a593Smuzhiyun lis 9, 0x0100 79*4882a593Smuzhiyun ori 9, 9, 0x0002 /* rw */ 80*4882a593Smuzhiyun mtspr 0x215, 9 /* IBAT2L */ 81*4882a593Smuzhiyun mtspr 0x214, 8 /* IBAT2U */ 82*4882a593Smuzhiyun mtspr 0x21d, 9 /* DBAT2L */ 83*4882a593Smuzhiyun mtspr 0x21c, 8 /* DBAT2U */ 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun lis 8, 0x1000 /* MEM2 */ 86*4882a593Smuzhiyun ori 8, 8, 0x07ff /* 64MiB */ 87*4882a593Smuzhiyun lis 9, 0x1000 88*4882a593Smuzhiyun ori 9, 9, 0x0002 /* rw */ 89*4882a593Smuzhiyun mtspr 0x216, 8 /* IBAT3U */ 90*4882a593Smuzhiyun mtspr 0x217, 9 /* IBAT3L */ 91*4882a593Smuzhiyun mtspr 0x21e, 8 /* DBAT3U */ 92*4882a593Smuzhiyun mtspr 0x21f, 9 /* DBAT3L */ 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun /* enable the high BATs */ 95*4882a593Smuzhiyun mfspr 8, 0x3f3 /* HID4 */ 96*4882a593Smuzhiyun oris 8, 8, 0x0200 97*4882a593Smuzhiyun mtspr 0x3f3, 8 /* HID4 */ 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* enable and invalidate the caches if not already enabled */ 100*4882a593Smuzhiyun mfspr 8, 0x3f0 /* HID0 */ 101*4882a593Smuzhiyun andi. 0, 8, (1<<15) /* HID0_ICE */ 102*4882a593Smuzhiyun bne 1f 103*4882a593Smuzhiyun ori 8, 8, (1<<15)|(1<<11) /* HID0_ICE|HID0_ICFI*/ 104*4882a593Smuzhiyun1: 105*4882a593Smuzhiyun andi. 0, 8, (1<<14) /* HID0_DCE */ 106*4882a593Smuzhiyun bne 1f 107*4882a593Smuzhiyun ori 8, 8, (1<<14)|(1<<10) /* HID0_DCE|HID0_DCFI*/ 108*4882a593Smuzhiyun1: 109*4882a593Smuzhiyun mtspr 0x3f0, 8 /* HID0 */ 110*4882a593Smuzhiyun isync 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* initialize arguments */ 113*4882a593Smuzhiyun li 3, 0 114*4882a593Smuzhiyun li 4, 0 115*4882a593Smuzhiyun li 5, 0 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /* turn the MMU on */ 118*4882a593Smuzhiyun bcl 20, 31, 1f 119*4882a593Smuzhiyun1: 120*4882a593Smuzhiyun mflr 8 121*4882a593Smuzhiyun addi 8, 8, _mmu_on - 1b 122*4882a593Smuzhiyun mfmsr 9 123*4882a593Smuzhiyun ori 9, 9, (1<<4)|(1<<5) /* MSR_DR|MSR_IR */ 124*4882a593Smuzhiyun mtsrr0 8 125*4882a593Smuzhiyun mtsrr1 9 126*4882a593Smuzhiyun sync 127*4882a593Smuzhiyun rfi 128*4882a593Smuzhiyun_mmu_on: 129*4882a593Smuzhiyun /* turn on the front blue led (aka: yay! we got here!) */ 130*4882a593Smuzhiyun lis 8, 0x0d00 131*4882a593Smuzhiyun ori 8, 8, 0x00c0 132*4882a593Smuzhiyun lwz 9, 0(8) 133*4882a593Smuzhiyun ori 9, 9, 0x20 134*4882a593Smuzhiyun stw 9, 0(8) 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun b _zimage_start_lib 137*4882a593Smuzhiyun 138