1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright © 2011 Tony Breeds IBM Corporation
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Based on earlier code:
6*4882a593Smuzhiyun * Copyright (C) Paul Mackerras 1997.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Matt Porter <mporter@kernel.crashing.org>
9*4882a593Smuzhiyun * Copyright 2002-2005 MontaVista Software Inc.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
12*4882a593Smuzhiyun * Copyright (c) 2003, 2004 Zultys Technologies
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * Copyright 2007 David Gibson, IBM Corporation.
15*4882a593Smuzhiyun * Copyright 2010 Ben. Herrenschmidt, IBM Corporation.
16*4882a593Smuzhiyun * Copyright © 2011 David Kleikamp IBM Corporation
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun #include <stdarg.h>
19*4882a593Smuzhiyun #include <stddef.h>
20*4882a593Smuzhiyun #include "types.h"
21*4882a593Smuzhiyun #include "elf.h"
22*4882a593Smuzhiyun #include "string.h"
23*4882a593Smuzhiyun #include "stdio.h"
24*4882a593Smuzhiyun #include "page.h"
25*4882a593Smuzhiyun #include "ops.h"
26*4882a593Smuzhiyun #include "reg.h"
27*4882a593Smuzhiyun #include "io.h"
28*4882a593Smuzhiyun #include "dcr.h"
29*4882a593Smuzhiyun #include "4xx.h"
30*4882a593Smuzhiyun #include "44x.h"
31*4882a593Smuzhiyun #include "libfdt.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun BSS_STACK(4096);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define MAX_RANKS 0x4
36*4882a593Smuzhiyun #define DDR3_MR0CF 0x80010011U
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static unsigned long long ibm_currituck_memsize;
ibm_currituck_detect_memsize(void)39*4882a593Smuzhiyun static unsigned long long ibm_currituck_detect_memsize(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun u32 reg;
42*4882a593Smuzhiyun unsigned i;
43*4882a593Smuzhiyun unsigned long long memsize = 0;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun for(i = 0; i < MAX_RANKS; i++){
46*4882a593Smuzhiyun reg = mfdcrx(DDR3_MR0CF + i);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun if (!(reg & 1))
49*4882a593Smuzhiyun continue;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun reg &= 0x0000f000;
52*4882a593Smuzhiyun reg >>= 12;
53*4882a593Smuzhiyun memsize += (0x800000ULL << reg);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun return memsize;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
ibm_currituck_fixups(void)59*4882a593Smuzhiyun static void ibm_currituck_fixups(void)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun void *devp = finddevice("/");
62*4882a593Smuzhiyun u32 dma_ranges[7];
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun dt_fixup_memory(0x0ULL, ibm_currituck_memsize);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun while ((devp = find_node_by_devtype(devp, "pci"))) {
67*4882a593Smuzhiyun if (getprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges)) < 0) {
68*4882a593Smuzhiyun printf("%s: Failed to get dma-ranges\r\n", __func__);
69*4882a593Smuzhiyun continue;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun dma_ranges[5] = ibm_currituck_memsize >> 32;
73*4882a593Smuzhiyun dma_ranges[6] = ibm_currituck_memsize & 0xffffffffUL;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun setprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges));
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun #define SPRN_PIR 0x11E /* Processor Identification Register */
platform_init(void)80*4882a593Smuzhiyun void platform_init(void)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun unsigned long end_of_ram, avail_ram;
83*4882a593Smuzhiyun u32 pir_reg;
84*4882a593Smuzhiyun int node, size;
85*4882a593Smuzhiyun const u32 *timebase;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun ibm_currituck_memsize = ibm_currituck_detect_memsize();
88*4882a593Smuzhiyun if (ibm_currituck_memsize >> 32)
89*4882a593Smuzhiyun end_of_ram = ~0UL;
90*4882a593Smuzhiyun else
91*4882a593Smuzhiyun end_of_ram = ibm_currituck_memsize;
92*4882a593Smuzhiyun avail_ram = end_of_ram - (unsigned long)_end;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun simple_alloc_init(_end, avail_ram, 128, 64);
95*4882a593Smuzhiyun platform_ops.fixups = ibm_currituck_fixups;
96*4882a593Smuzhiyun platform_ops.exit = ibm44x_dbcr_reset;
97*4882a593Smuzhiyun pir_reg = mfspr(SPRN_PIR);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* Make sure FDT blob is sane */
100*4882a593Smuzhiyun if (fdt_check_header(_dtb_start) != 0)
101*4882a593Smuzhiyun fatal("Invalid device tree blob\n");
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
104*4882a593Smuzhiyun "cpu", sizeof("cpu"));
105*4882a593Smuzhiyun if (!node)
106*4882a593Smuzhiyun fatal("Cannot find cpu node\n");
107*4882a593Smuzhiyun timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size);
108*4882a593Smuzhiyun if (timebase && (size == 4))
109*4882a593Smuzhiyun timebase_period_ns = 1000000000 / *timebase;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun fdt_set_boot_cpuid_phys(_dtb_start, pir_reg);
112*4882a593Smuzhiyun fdt_init(_dtb_start);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun serial_console_init();
115*4882a593Smuzhiyun }
116