1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Source for PIKA Warp 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2008-2009 PIKA Technologies 5*4882a593Smuzhiyun * Sean MacLennan <smaclennan@pikatech.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 8*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without 9*4882a593Smuzhiyun * any warranty of any kind, whether express or implied. 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/dts-v1/; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/ { 15*4882a593Smuzhiyun #address-cells = <2>; 16*4882a593Smuzhiyun #size-cells = <1>; 17*4882a593Smuzhiyun model = "pika,warp"; 18*4882a593Smuzhiyun compatible = "pika,warp"; 19*4882a593Smuzhiyun dcr-parent = <&{/cpus/cpu@0}>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun aliases { 22*4882a593Smuzhiyun ethernet0 = &EMAC0; 23*4882a593Smuzhiyun serial0 = &UART0; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun cpus { 27*4882a593Smuzhiyun #address-cells = <1>; 28*4882a593Smuzhiyun #size-cells = <0>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun cpu@0 { 31*4882a593Smuzhiyun device_type = "cpu"; 32*4882a593Smuzhiyun model = "PowerPC,440EP"; 33*4882a593Smuzhiyun reg = <0x00000000>; 34*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 35*4882a593Smuzhiyun timebase-frequency = <0>; /* Filled in by zImage */ 36*4882a593Smuzhiyun i-cache-line-size = <32>; 37*4882a593Smuzhiyun d-cache-line-size = <32>; 38*4882a593Smuzhiyun i-cache-size = <32768>; 39*4882a593Smuzhiyun d-cache-size = <32768>; 40*4882a593Smuzhiyun dcr-controller; 41*4882a593Smuzhiyun dcr-access-method = "native"; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun memory { 46*4882a593Smuzhiyun device_type = "memory"; 47*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun UIC0: interrupt-controller0 { 51*4882a593Smuzhiyun compatible = "ibm,uic-440ep","ibm,uic"; 52*4882a593Smuzhiyun interrupt-controller; 53*4882a593Smuzhiyun cell-index = <0>; 54*4882a593Smuzhiyun dcr-reg = <0x0c0 0x009>; 55*4882a593Smuzhiyun #address-cells = <0>; 56*4882a593Smuzhiyun #size-cells = <0>; 57*4882a593Smuzhiyun #interrupt-cells = <2>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun UIC1: interrupt-controller1 { 61*4882a593Smuzhiyun compatible = "ibm,uic-440ep","ibm,uic"; 62*4882a593Smuzhiyun interrupt-controller; 63*4882a593Smuzhiyun cell-index = <1>; 64*4882a593Smuzhiyun dcr-reg = <0x0d0 0x009>; 65*4882a593Smuzhiyun #address-cells = <0>; 66*4882a593Smuzhiyun #size-cells = <0>; 67*4882a593Smuzhiyun #interrupt-cells = <2>; 68*4882a593Smuzhiyun interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 69*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun SDR0: sdr { 73*4882a593Smuzhiyun compatible = "ibm,sdr-440ep"; 74*4882a593Smuzhiyun dcr-reg = <0x00e 0x002>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun CPR0: cpr { 78*4882a593Smuzhiyun compatible = "ibm,cpr-440ep"; 79*4882a593Smuzhiyun dcr-reg = <0x00c 0x002>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun plb { 83*4882a593Smuzhiyun compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 84*4882a593Smuzhiyun #address-cells = <2>; 85*4882a593Smuzhiyun #size-cells = <1>; 86*4882a593Smuzhiyun ranges; 87*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun SDRAM0: sdram { 90*4882a593Smuzhiyun compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 91*4882a593Smuzhiyun dcr-reg = <0x010 0x002>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun DMA0: dma { 95*4882a593Smuzhiyun compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 96*4882a593Smuzhiyun dcr-reg = <0x100 0x027>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun MAL0: mcmal { 100*4882a593Smuzhiyun compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 101*4882a593Smuzhiyun dcr-reg = <0x180 0x062>; 102*4882a593Smuzhiyun num-tx-chans = <4>; 103*4882a593Smuzhiyun num-rx-chans = <2>; 104*4882a593Smuzhiyun interrupt-parent = <&MAL0>; 105*4882a593Smuzhiyun interrupts = <0x0 0x1 0x2 0x3 0x4>; 106*4882a593Smuzhiyun #interrupt-cells = <1>; 107*4882a593Smuzhiyun #address-cells = <0>; 108*4882a593Smuzhiyun #size-cells = <0>; 109*4882a593Smuzhiyun interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 110*4882a593Smuzhiyun /*RXEOB*/ 0x1 &UIC0 0xb 0x4 111*4882a593Smuzhiyun /*SERR*/ 0x2 &UIC1 0x0 0x4 112*4882a593Smuzhiyun /*TXDE*/ 0x3 &UIC1 0x1 0x4 113*4882a593Smuzhiyun /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun POB0: opb { 117*4882a593Smuzhiyun compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 118*4882a593Smuzhiyun #address-cells = <1>; 119*4882a593Smuzhiyun #size-cells = <1>; 120*4882a593Smuzhiyun ranges = <0x00000000 0x00000000 0x00000000 0x80000000 121*4882a593Smuzhiyun 0x80000000 0x00000000 0x80000000 0x80000000>; 122*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 123*4882a593Smuzhiyun interrupts = <0x7 0x4>; 124*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun EBC0: ebc { 127*4882a593Smuzhiyun compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 128*4882a593Smuzhiyun dcr-reg = <0x012 0x002>; 129*4882a593Smuzhiyun #address-cells = <2>; 130*4882a593Smuzhiyun #size-cells = <1>; 131*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 132*4882a593Smuzhiyun interrupts = <0x5 0x1>; 133*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun fpga@2,0 { 136*4882a593Smuzhiyun compatible = "pika,fpga"; 137*4882a593Smuzhiyun reg = <0x00000002 0x00000000 0x00001000>; 138*4882a593Smuzhiyun interrupts = <0x18 0x8>; 139*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun fpga@2,2000 { 143*4882a593Smuzhiyun compatible = "pika,fpga-sgl"; 144*4882a593Smuzhiyun reg = <0x00000002 0x00002000 0x00000200>; 145*4882a593Smuzhiyun }; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun fpga@2,4000 { 148*4882a593Smuzhiyun compatible = "pika,fpga-sd"; 149*4882a593Smuzhiyun reg = <0x00000002 0x00004000 0x00004000>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun nor@0,0 { 153*4882a593Smuzhiyun compatible = "amd,s29gl032a", "cfi-flash"; 154*4882a593Smuzhiyun bank-width = <2>; 155*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x00400000>; 156*4882a593Smuzhiyun #address-cells = <1>; 157*4882a593Smuzhiyun #size-cells = <1>; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun partition@0 { 160*4882a593Smuzhiyun label = "splash"; 161*4882a593Smuzhiyun reg = <0x00000000 0x00010000>; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun partition@300000 { 164*4882a593Smuzhiyun label = "fpga"; 165*4882a593Smuzhiyun reg = <0x0300000 0x00040000>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun partition@340000 { 168*4882a593Smuzhiyun label = "env"; 169*4882a593Smuzhiyun reg = <0x0340000 0x00040000>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun partition@380000 { 172*4882a593Smuzhiyun label = "u-boot"; 173*4882a593Smuzhiyun reg = <0x0380000 0x00080000>; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun ndfc@1,0 { 178*4882a593Smuzhiyun compatible = "ibm,ndfc"; 179*4882a593Smuzhiyun reg = <0x00000001 0x00000000 0x00002000>; 180*4882a593Smuzhiyun ccr = <0x00001000>; 181*4882a593Smuzhiyun bank-settings = <0x80002222>; 182*4882a593Smuzhiyun #address-cells = <1>; 183*4882a593Smuzhiyun #size-cells = <1>; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun nand { 186*4882a593Smuzhiyun #address-cells = <1>; 187*4882a593Smuzhiyun #size-cells = <1>; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun partition@0 { 190*4882a593Smuzhiyun label = "kernel"; 191*4882a593Smuzhiyun reg = <0x00000000 0x00200000>; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun partition@200000 { 194*4882a593Smuzhiyun label = "root"; 195*4882a593Smuzhiyun reg = <0x00200000 0x03E00000>; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun partition@40000000 { 198*4882a593Smuzhiyun label = "persistent"; 199*4882a593Smuzhiyun reg = <0x04000000 0x04000000>; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun partition@80000000 { 202*4882a593Smuzhiyun label = "persistent1"; 203*4882a593Smuzhiyun reg = <0x08000000 0x04000000>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun partition@C0000000 { 206*4882a593Smuzhiyun label = "persistent2"; 207*4882a593Smuzhiyun reg = <0x0C000000 0x04000000>; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun UART0: serial@ef600300 { 214*4882a593Smuzhiyun device_type = "serial"; 215*4882a593Smuzhiyun compatible = "ns16550"; 216*4882a593Smuzhiyun reg = <0xef600300 0x00000008>; 217*4882a593Smuzhiyun virtual-reg = <0xef600300>; 218*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 219*4882a593Smuzhiyun current-speed = <115200>; 220*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 221*4882a593Smuzhiyun interrupts = <0x0 0x4>; 222*4882a593Smuzhiyun }; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun IIC0: i2c@ef600700 { 225*4882a593Smuzhiyun compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 226*4882a593Smuzhiyun reg = <0xef600700 0x00000014>; 227*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 228*4882a593Smuzhiyun interrupts = <0x2 0x4>; 229*4882a593Smuzhiyun #address-cells = <1>; 230*4882a593Smuzhiyun #size-cells = <0>; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun ad7414@4a { 233*4882a593Smuzhiyun compatible = "adi,ad7414"; 234*4882a593Smuzhiyun reg = <0x4a>; 235*4882a593Smuzhiyun interrupts = <0x19 0x8>; 236*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun /* This will create 52 and 53 */ 240*4882a593Smuzhiyun at24@52 { 241*4882a593Smuzhiyun compatible = "atmel,24c04"; 242*4882a593Smuzhiyun reg = <0x52>; 243*4882a593Smuzhiyun }; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun GPIO0: gpio@ef600b00 { 247*4882a593Smuzhiyun compatible = "ibm,ppc4xx-gpio"; 248*4882a593Smuzhiyun reg = <0xef600b00 0x00000048>; 249*4882a593Smuzhiyun #gpio-cells = <2>; 250*4882a593Smuzhiyun gpio-controller; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun GPIO1: gpio@ef600c00 { 254*4882a593Smuzhiyun compatible = "ibm,ppc4xx-gpio"; 255*4882a593Smuzhiyun reg = <0xef600c00 0x00000048>; 256*4882a593Smuzhiyun #gpio-cells = <2>; 257*4882a593Smuzhiyun gpio-controller; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun power-leds { 261*4882a593Smuzhiyun compatible = "gpio-leds"; 262*4882a593Smuzhiyun green { 263*4882a593Smuzhiyun gpios = <&GPIO1 0 0>; 264*4882a593Smuzhiyun default-state = "keep"; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun red { 267*4882a593Smuzhiyun gpios = <&GPIO1 1 0>; 268*4882a593Smuzhiyun default-state = "keep"; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun ZMII0: emac-zmii@ef600d00 { 273*4882a593Smuzhiyun compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 274*4882a593Smuzhiyun reg = <0xef600d00 0x0000000c>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun EMAC0: ethernet@ef600e00 { 278*4882a593Smuzhiyun device_type = "network"; 279*4882a593Smuzhiyun compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 280*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 281*4882a593Smuzhiyun interrupts = <0x1c 0x4 0x1d 0x4>; 282*4882a593Smuzhiyun reg = <0xef600e00 0x00000070>; 283*4882a593Smuzhiyun local-mac-address = [000000000000]; 284*4882a593Smuzhiyun mal-device = <&MAL0>; 285*4882a593Smuzhiyun mal-tx-channel = <0 1>; 286*4882a593Smuzhiyun mal-rx-channel = <0>; 287*4882a593Smuzhiyun cell-index = <0>; 288*4882a593Smuzhiyun max-frame-size = <1500>; 289*4882a593Smuzhiyun rx-fifo-size = <4096>; 290*4882a593Smuzhiyun tx-fifo-size = <2048>; 291*4882a593Smuzhiyun phy-mode = "rmii"; 292*4882a593Smuzhiyun phy-map = <0x00000000>; 293*4882a593Smuzhiyun zmii-device = <&ZMII0>; 294*4882a593Smuzhiyun zmii-channel = <0>; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun usb@ef601000 { 298*4882a593Smuzhiyun compatible = "ohci-be"; 299*4882a593Smuzhiyun reg = <0xef601000 0x00000080>; 300*4882a593Smuzhiyun interrupts = <0x8 0x1 0x9 0x1>; 301*4882a593Smuzhiyun interrupt-parent = < &UIC1 >; 302*4882a593Smuzhiyun }; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun chosen { 307*4882a593Smuzhiyun stdout-path = "/plb/opb/serial@ef600300"; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun}; 310