xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/storcenter.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree Source for IOMEGA StorCenter
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2007 Oyvind Repvik
5*4882a593Smuzhiyun * Copyright 2007 Jon Loeliger
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
10*4882a593Smuzhiyun * License version 2.  This program is licensed "as is" without any
11*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/dts-v1/;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun/ {
17*4882a593Smuzhiyun	model = "StorCenter";
18*4882a593Smuzhiyun	compatible = "iomega,storcenter";
19*4882a593Smuzhiyun	#address-cells = <1>;
20*4882a593Smuzhiyun	#size-cells = <1>;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	aliases {
23*4882a593Smuzhiyun		serial0 = &serial0;
24*4882a593Smuzhiyun		serial1 = &serial1;
25*4882a593Smuzhiyun		pci0 = &pci0;
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	cpus {
29*4882a593Smuzhiyun		#address-cells = <1>;
30*4882a593Smuzhiyun		#size-cells = <0>;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		PowerPC,8241@0 {
33*4882a593Smuzhiyun			device_type = "cpu";
34*4882a593Smuzhiyun			reg = <0>;
35*4882a593Smuzhiyun			clock-frequency = <200000000>;
36*4882a593Smuzhiyun			timebase-frequency = <25000000>;
37*4882a593Smuzhiyun			bus-frequency = <0>;	/* from bootwrapper */
38*4882a593Smuzhiyun			i-cache-line-size = <32>;
39*4882a593Smuzhiyun			d-cache-line-size = <32>;
40*4882a593Smuzhiyun			i-cache-size = <16384>;
41*4882a593Smuzhiyun			d-cache-size = <16384>;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	memory {
46*4882a593Smuzhiyun		device_type = "memory";
47*4882a593Smuzhiyun		reg = <0x00000000 0x04000000>;	/* 64MB @ 0x0 */
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	soc@fc000000 {
51*4882a593Smuzhiyun		#address-cells = <1>;
52*4882a593Smuzhiyun		#size-cells = <1>;
53*4882a593Smuzhiyun		device_type = "soc";
54*4882a593Smuzhiyun		compatible = "fsl,mpc8241", "mpc10x";
55*4882a593Smuzhiyun		store-gathering = <0>; /* 0 == off, !0 == on */
56*4882a593Smuzhiyun		ranges = <0x0 0xfc000000 0x100000>;
57*4882a593Smuzhiyun		reg = <0xfc000000 0x100000>;	/* EUMB */
58*4882a593Smuzhiyun		bus-frequency = <0>;		/* fixed by loader */
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		i2c@3000 {
61*4882a593Smuzhiyun			#address-cells = <1>;
62*4882a593Smuzhiyun			#size-cells = <0>;
63*4882a593Smuzhiyun			compatible = "fsl-i2c";
64*4882a593Smuzhiyun			reg = <0x3000 0x100>;
65*4882a593Smuzhiyun			interrupts = <17 2>;
66*4882a593Smuzhiyun			interrupt-parent = <&mpic>;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun			rtc@68 {
69*4882a593Smuzhiyun				compatible = "dallas,ds1337";
70*4882a593Smuzhiyun				reg = <0x68>;
71*4882a593Smuzhiyun			};
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		serial0: serial@4500 {
75*4882a593Smuzhiyun			cell-index = <0>;
76*4882a593Smuzhiyun			device_type = "serial";
77*4882a593Smuzhiyun			compatible = "fsl,ns16550", "ns16550";
78*4882a593Smuzhiyun			reg = <0x4500 0x20>;
79*4882a593Smuzhiyun			clock-frequency = <97553800>; /* Hz */
80*4882a593Smuzhiyun			current-speed = <115200>;
81*4882a593Smuzhiyun			interrupts = <25 2>;
82*4882a593Smuzhiyun			interrupt-parent = <&mpic>;
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		serial1: serial@4600 {
86*4882a593Smuzhiyun			cell-index = <1>;
87*4882a593Smuzhiyun			device_type = "serial";
88*4882a593Smuzhiyun			compatible = "fsl,ns16550", "ns16550";
89*4882a593Smuzhiyun			reg = <0x4600 0x20>;
90*4882a593Smuzhiyun			clock-frequency = <97553800>; /* Hz */
91*4882a593Smuzhiyun			current-speed = <9600>;
92*4882a593Smuzhiyun			interrupts = <26 2>;
93*4882a593Smuzhiyun			interrupt-parent = <&mpic>;
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		mpic: interrupt-controller@40000 {
97*4882a593Smuzhiyun			#interrupt-cells = <2>;
98*4882a593Smuzhiyun			#address-cells = <0>;
99*4882a593Smuzhiyun			device_type = "open-pic";
100*4882a593Smuzhiyun			compatible = "chrp,open-pic";
101*4882a593Smuzhiyun			interrupt-controller;
102*4882a593Smuzhiyun			reg = <0x40000 0x40000>;
103*4882a593Smuzhiyun		};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun	pci0: pci@fe800000 {
108*4882a593Smuzhiyun		#address-cells = <3>;
109*4882a593Smuzhiyun		#size-cells = <2>;
110*4882a593Smuzhiyun		#interrupt-cells = <1>;
111*4882a593Smuzhiyun		device_type = "pci";
112*4882a593Smuzhiyun		compatible = "mpc10x-pci";
113*4882a593Smuzhiyun		reg = <0xfe800000 0x1000>;
114*4882a593Smuzhiyun		ranges = <0x01000000 0x0        0x0 0xfe000000 0x0 0x00c00000
115*4882a593Smuzhiyun			  0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
116*4882a593Smuzhiyun		bus-range = <0 0xff>;
117*4882a593Smuzhiyun		clock-frequency = <97553800>;
118*4882a593Smuzhiyun		interrupt-parent = <&mpic>;
119*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0 0 7>;
120*4882a593Smuzhiyun		interrupt-map = <
121*4882a593Smuzhiyun			/* IDSEL 13 - IDE */
122*4882a593Smuzhiyun			0x6800 0 0 1 &mpic 0 1
123*4882a593Smuzhiyun			0x6800 0 0 2 &mpic 0 1
124*4882a593Smuzhiyun			0x6800 0 0 3 &mpic 0 1
125*4882a593Smuzhiyun			0x6800 0 0 4 &mpic 0 1
126*4882a593Smuzhiyun			/* IDSEL 14 - USB */
127*4882a593Smuzhiyun			0x7000 0 0 1 &mpic 0 1
128*4882a593Smuzhiyun			0x7000 0 0 2 &mpic 0 1
129*4882a593Smuzhiyun			0x7000 0 0 3 &mpic 0 1
130*4882a593Smuzhiyun			0x7000 0 0 4 &mpic 0 1
131*4882a593Smuzhiyun			/* IDSEL 15 - ETH */
132*4882a593Smuzhiyun			0x7800 0 0 1 &mpic 0 1
133*4882a593Smuzhiyun			0x7800 0 0 2 &mpic 0 1
134*4882a593Smuzhiyun			0x7800 0 0 3 &mpic 0 1
135*4882a593Smuzhiyun			0x7800 0 0 4 &mpic 0 1
136*4882a593Smuzhiyun		>;
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	chosen {
140*4882a593Smuzhiyun		stdout-path = &serial0;
141*4882a593Smuzhiyun	};
142*4882a593Smuzhiyun};
143