1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Source for AMCC Redwood(460SX) 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2008 AMCC <tmarri@amcc.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 7*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without 8*4882a593Smuzhiyun * any warranty of any kind, whether express or implied. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun #address-cells = <2>; 15*4882a593Smuzhiyun #size-cells = <1>; 16*4882a593Smuzhiyun model = "amcc,redwood"; 17*4882a593Smuzhiyun compatible = "amcc,redwood"; 18*4882a593Smuzhiyun dcr-parent = <&{/cpus/cpu@0}>; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun aliases { 21*4882a593Smuzhiyun ethernet0 = &EMAC0; 22*4882a593Smuzhiyun serial0 = &UART0; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun cpus { 26*4882a593Smuzhiyun #address-cells = <1>; 27*4882a593Smuzhiyun #size-cells = <0>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun cpu@0 { 30*4882a593Smuzhiyun device_type = "cpu"; 31*4882a593Smuzhiyun model = "PowerPC,460SX"; 32*4882a593Smuzhiyun reg = <0x00000000>; 33*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 34*4882a593Smuzhiyun timebase-frequency = <0>; /* Filled in by U-Boot */ 35*4882a593Smuzhiyun i-cache-line-size = <32>; 36*4882a593Smuzhiyun d-cache-line-size = <32>; 37*4882a593Smuzhiyun i-cache-size = <32768>; 38*4882a593Smuzhiyun d-cache-size = <32768>; 39*4882a593Smuzhiyun dcr-controller; 40*4882a593Smuzhiyun dcr-access-method = "native"; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun memory { 45*4882a593Smuzhiyun device_type = "memory"; 46*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun UIC0: interrupt-controller0 { 50*4882a593Smuzhiyun compatible = "ibm,uic-460sx","ibm,uic"; 51*4882a593Smuzhiyun interrupt-controller; 52*4882a593Smuzhiyun cell-index = <0>; 53*4882a593Smuzhiyun dcr-reg = <0x0c0 0x009>; 54*4882a593Smuzhiyun #address-cells = <0>; 55*4882a593Smuzhiyun #size-cells = <0>; 56*4882a593Smuzhiyun #interrupt-cells = <2>; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun UIC1: interrupt-controller1 { 60*4882a593Smuzhiyun compatible = "ibm,uic-460sx","ibm,uic"; 61*4882a593Smuzhiyun interrupt-controller; 62*4882a593Smuzhiyun cell-index = <1>; 63*4882a593Smuzhiyun dcr-reg = <0x0d0 0x009>; 64*4882a593Smuzhiyun #address-cells = <0>; 65*4882a593Smuzhiyun #size-cells = <0>; 66*4882a593Smuzhiyun #interrupt-cells = <2>; 67*4882a593Smuzhiyun interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 68*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun UIC2: interrupt-controller2 { 72*4882a593Smuzhiyun compatible = "ibm,uic-460sx","ibm,uic"; 73*4882a593Smuzhiyun interrupt-controller; 74*4882a593Smuzhiyun cell-index = <2>; 75*4882a593Smuzhiyun dcr-reg = <0x0e0 0x009>; 76*4882a593Smuzhiyun #address-cells = <0>; 77*4882a593Smuzhiyun #size-cells = <0>; 78*4882a593Smuzhiyun #interrupt-cells = <2>; 79*4882a593Smuzhiyun interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ 80*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun UIC3: interrupt-controller3 { 84*4882a593Smuzhiyun compatible = "ibm,uic-460sx","ibm,uic"; 85*4882a593Smuzhiyun interrupt-controller; 86*4882a593Smuzhiyun cell-index = <3>; 87*4882a593Smuzhiyun dcr-reg = <0x0f0 0x009>; 88*4882a593Smuzhiyun #address-cells = <0>; 89*4882a593Smuzhiyun #size-cells = <0>; 90*4882a593Smuzhiyun #interrupt-cells = <2>; 91*4882a593Smuzhiyun interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ 92*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun SDR0: sdr { 96*4882a593Smuzhiyun compatible = "ibm,sdr-460sx"; 97*4882a593Smuzhiyun dcr-reg = <0x00e 0x002>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun CPR0: cpr { 101*4882a593Smuzhiyun compatible = "ibm,cpr-460sx"; 102*4882a593Smuzhiyun dcr-reg = <0x00c 0x002>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun plb { 106*4882a593Smuzhiyun compatible = "ibm,plb-460sx", "ibm,plb4"; 107*4882a593Smuzhiyun #address-cells = <2>; 108*4882a593Smuzhiyun #size-cells = <1>; 109*4882a593Smuzhiyun ranges; 110*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun SDRAM0: sdram { 113*4882a593Smuzhiyun compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; 114*4882a593Smuzhiyun dcr-reg = <0x010 0x002>; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun MAL0: mcmal { 118*4882a593Smuzhiyun compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; 119*4882a593Smuzhiyun dcr-reg = <0x180 0x62>; 120*4882a593Smuzhiyun num-tx-chans = <4>; 121*4882a593Smuzhiyun num-rx-chans = <32>; 122*4882a593Smuzhiyun #address-cells = <1>; 123*4882a593Smuzhiyun #size-cells = <1>; 124*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 125*4882a593Smuzhiyun interrupts = < /*TXEOB*/ 0x6 0x4 126*4882a593Smuzhiyun /*RXEOB*/ 0x7 0x4 127*4882a593Smuzhiyun /*SERR*/ 0x1 0x4 128*4882a593Smuzhiyun /*TXDE*/ 0x2 0x4 129*4882a593Smuzhiyun /*RXDE*/ 0x3 0x4 130*4882a593Smuzhiyun /*COAL TX0*/ 0x18 0x2 131*4882a593Smuzhiyun /*COAL TX1*/ 0x19 0x2 132*4882a593Smuzhiyun /*COAL TX2*/ 0x1a 0x2 133*4882a593Smuzhiyun /*COAL TX3*/ 0x1b 0x2 134*4882a593Smuzhiyun /*COAL RX0*/ 0x1c 0x2 135*4882a593Smuzhiyun /*COAL RX1*/ 0x1d 0x2 136*4882a593Smuzhiyun /*COAL RX2*/ 0x1e 0x2 137*4882a593Smuzhiyun /*COAL RX3*/ 0x1f 0x2>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun POB0: opb { 141*4882a593Smuzhiyun compatible = "ibm,opb-460sx", "ibm,opb"; 142*4882a593Smuzhiyun #address-cells = <1>; 143*4882a593Smuzhiyun #size-cells = <1>; 144*4882a593Smuzhiyun ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 145*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun EBC0: ebc { 148*4882a593Smuzhiyun compatible = "ibm,ebc-460sx", "ibm,ebc"; 149*4882a593Smuzhiyun dcr-reg = <0x012 0x002>; 150*4882a593Smuzhiyun #address-cells = <2>; 151*4882a593Smuzhiyun #size-cells = <1>; 152*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 153*4882a593Smuzhiyun /* ranges property is supplied by U-Boot */ 154*4882a593Smuzhiyun interrupts = <0x6 0x4>; 155*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun nor_flash@0,0 { 158*4882a593Smuzhiyun compatible = "amd,s29gl512n", "cfi-flash"; 159*4882a593Smuzhiyun bank-width = <2>; 160*4882a593Smuzhiyun reg = <0x0000000 0x00000000 0x04000000>; 161*4882a593Smuzhiyun #address-cells = <1>; 162*4882a593Smuzhiyun #size-cells = <1>; 163*4882a593Smuzhiyun partition@0 { 164*4882a593Smuzhiyun label = "kernel"; 165*4882a593Smuzhiyun reg = <0x00000000 0x001e0000>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun partition@1e0000 { 168*4882a593Smuzhiyun label = "dtb"; 169*4882a593Smuzhiyun reg = <0x001e0000 0x00020000>; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun partition@200000 { 172*4882a593Smuzhiyun label = "ramdisk"; 173*4882a593Smuzhiyun reg = <0x00200000 0x01400000>; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun partition@1600000 { 176*4882a593Smuzhiyun label = "jffs2"; 177*4882a593Smuzhiyun reg = <0x01600000 0x00400000>; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun partition@1a00000 { 180*4882a593Smuzhiyun label = "user"; 181*4882a593Smuzhiyun reg = <0x01a00000 0x02560000>; 182*4882a593Smuzhiyun }; 183*4882a593Smuzhiyun partition@3f60000 { 184*4882a593Smuzhiyun label = "env"; 185*4882a593Smuzhiyun reg = <0x03f60000 0x00040000>; 186*4882a593Smuzhiyun }; 187*4882a593Smuzhiyun partition@3fa0000 { 188*4882a593Smuzhiyun label = "u-boot"; 189*4882a593Smuzhiyun reg = <0x03fa0000 0x00060000>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun UART0: serial@ef600200 { 195*4882a593Smuzhiyun device_type = "serial"; 196*4882a593Smuzhiyun compatible = "ns16550"; 197*4882a593Smuzhiyun reg = <0xef600200 0x00000008>; 198*4882a593Smuzhiyun virtual-reg = <0xef600200>; 199*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 200*4882a593Smuzhiyun current-speed = <0>; /* Filled in by U-Boot */ 201*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 202*4882a593Smuzhiyun interrupts = <0x0 0x4>; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun RGMII0: emac-rgmii@ef600900 { 206*4882a593Smuzhiyun compatible = "ibm,rgmii-460sx", "ibm,rgmii"; 207*4882a593Smuzhiyun reg = <0xef600900 0x00000008>; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun EMAC0: ethernet@ef600a00 { 211*4882a593Smuzhiyun device_type = "network"; 212*4882a593Smuzhiyun compatible = "ibm,emac-460sx", "ibm,emac4"; 213*4882a593Smuzhiyun interrupt-parent = <&EMAC0>; 214*4882a593Smuzhiyun interrupts = <0x0 0x1>; 215*4882a593Smuzhiyun #interrupt-cells = <1>; 216*4882a593Smuzhiyun #address-cells = <0>; 217*4882a593Smuzhiyun #size-cells = <0>; 218*4882a593Smuzhiyun interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 219*4882a593Smuzhiyun /*Wake*/ 0x1 &UIC2 0x1d 0x4>; 220*4882a593Smuzhiyun reg = <0xef600a00 0x00000070>; 221*4882a593Smuzhiyun local-mac-address = [000000000000]; /* Filled in by U-Boot */ 222*4882a593Smuzhiyun mal-device = <&MAL0>; 223*4882a593Smuzhiyun mal-tx-channel = <0>; 224*4882a593Smuzhiyun mal-rx-channel = <0>; 225*4882a593Smuzhiyun cell-index = <0>; 226*4882a593Smuzhiyun max-frame-size = <9000>; 227*4882a593Smuzhiyun rx-fifo-size = <4096>; 228*4882a593Smuzhiyun tx-fifo-size = <2048>; 229*4882a593Smuzhiyun rx-fifo-size-gige = <16384>; 230*4882a593Smuzhiyun phy-mode = "rgmii"; 231*4882a593Smuzhiyun phy-map = <0x00000000>; 232*4882a593Smuzhiyun rgmii-device = <&RGMII0>; 233*4882a593Smuzhiyun rgmii-channel = <0>; 234*4882a593Smuzhiyun has-inverted-stacr-oc; 235*4882a593Smuzhiyun has-new-stacr-staopc; 236*4882a593Smuzhiyun }; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun PCIE0: pcie@d00000000 { 239*4882a593Smuzhiyun device_type = "pci"; 240*4882a593Smuzhiyun #interrupt-cells = <1>; 241*4882a593Smuzhiyun #size-cells = <2>; 242*4882a593Smuzhiyun #address-cells = <3>; 243*4882a593Smuzhiyun compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; 244*4882a593Smuzhiyun primary; 245*4882a593Smuzhiyun port = <0x0>; /* port number */ 246*4882a593Smuzhiyun reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ 247*4882a593Smuzhiyun 0x0000000c 0x10000000 0x00001000>; /* Registers */ 248*4882a593Smuzhiyun dcr-reg = <0x100 0x020>; 249*4882a593Smuzhiyun sdr-base = <0x300>; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun /* Outbound ranges, one memory and one IO, 252*4882a593Smuzhiyun * later cannot be changed 253*4882a593Smuzhiyun */ 254*4882a593Smuzhiyun ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 255*4882a593Smuzhiyun 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun /* Inbound 2GB range starting at 0 */ 258*4882a593Smuzhiyun dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun /* This drives busses 10 to 0x1f */ 261*4882a593Smuzhiyun bus-range = <0x10 0x1f>; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun /* Legacy interrupts (note the weird polarity, the bridge seems 264*4882a593Smuzhiyun * to invert PCIe legacy interrupts). 265*4882a593Smuzhiyun * We are de-swizzling here because the numbers are actually for 266*4882a593Smuzhiyun * port of the root complex virtual P2P bridge. But I want 267*4882a593Smuzhiyun * to avoid putting a node for it in the tree, so the numbers 268*4882a593Smuzhiyun * below are basically de-swizzled numbers. 269*4882a593Smuzhiyun * The real slot is on idsel 0, so the swizzling is 1:1 270*4882a593Smuzhiyun */ 271*4882a593Smuzhiyun interrupt-map-mask = <0x0 0x0 0x0 0x7>; 272*4882a593Smuzhiyun interrupt-map = < 273*4882a593Smuzhiyun 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ 274*4882a593Smuzhiyun 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ 275*4882a593Smuzhiyun 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ 276*4882a593Smuzhiyun 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; 277*4882a593Smuzhiyun }; 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun PCIE1: pcie@d20000000 { 280*4882a593Smuzhiyun device_type = "pci"; 281*4882a593Smuzhiyun #interrupt-cells = <1>; 282*4882a593Smuzhiyun #size-cells = <2>; 283*4882a593Smuzhiyun #address-cells = <3>; 284*4882a593Smuzhiyun compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; 285*4882a593Smuzhiyun primary; 286*4882a593Smuzhiyun port = <0x1>; /* port number */ 287*4882a593Smuzhiyun reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ 288*4882a593Smuzhiyun 0x0000000c 0x10001000 0x00001000>; /* Registers */ 289*4882a593Smuzhiyun dcr-reg = <0x120 0x020>; 290*4882a593Smuzhiyun sdr-base = <0x340>; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun /* Outbound ranges, one memory and one IO, 293*4882a593Smuzhiyun * later cannot be changed 294*4882a593Smuzhiyun */ 295*4882a593Smuzhiyun ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 296*4882a593Smuzhiyun 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun /* Inbound 2GB range starting at 0 */ 299*4882a593Smuzhiyun dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun /* This drives busses 10 to 0x1f */ 302*4882a593Smuzhiyun bus-range = <0x20 0x2f>; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun /* Legacy interrupts (note the weird polarity, the bridge seems 305*4882a593Smuzhiyun * to invert PCIe legacy interrupts). 306*4882a593Smuzhiyun * We are de-swizzling here because the numbers are actually for 307*4882a593Smuzhiyun * port of the root complex virtual P2P bridge. But I want 308*4882a593Smuzhiyun * to avoid putting a node for it in the tree, so the numbers 309*4882a593Smuzhiyun * below are basically de-swizzled numbers. 310*4882a593Smuzhiyun * The real slot is on idsel 0, so the swizzling is 1:1 311*4882a593Smuzhiyun */ 312*4882a593Smuzhiyun interrupt-map-mask = <0x0 0x0 0x0 0x7>; 313*4882a593Smuzhiyun interrupt-map = < 314*4882a593Smuzhiyun 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ 315*4882a593Smuzhiyun 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ 316*4882a593Smuzhiyun 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ 317*4882a593Smuzhiyun 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; 318*4882a593Smuzhiyun }; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun PCIE2: pcie@d40000000 { 321*4882a593Smuzhiyun device_type = "pci"; 322*4882a593Smuzhiyun #interrupt-cells = <1>; 323*4882a593Smuzhiyun #size-cells = <2>; 324*4882a593Smuzhiyun #address-cells = <3>; 325*4882a593Smuzhiyun compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; 326*4882a593Smuzhiyun primary; 327*4882a593Smuzhiyun port = <0x2>; /* port number */ 328*4882a593Smuzhiyun reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ 329*4882a593Smuzhiyun 0x0000000c 0x10002000 0x00001000>; /* Registers */ 330*4882a593Smuzhiyun dcr-reg = <0x140 0x020>; 331*4882a593Smuzhiyun sdr-base = <0x370>; 332*4882a593Smuzhiyun 333*4882a593Smuzhiyun /* Outbound ranges, one memory and one IO, 334*4882a593Smuzhiyun * later cannot be changed 335*4882a593Smuzhiyun */ 336*4882a593Smuzhiyun ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 337*4882a593Smuzhiyun 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun /* Inbound 2GB range starting at 0 */ 340*4882a593Smuzhiyun dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun /* This drives busses 10 to 0x1f */ 343*4882a593Smuzhiyun bus-range = <0x30 0x3f>; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun /* Legacy interrupts (note the weird polarity, the bridge seems 346*4882a593Smuzhiyun * to invert PCIe legacy interrupts). 347*4882a593Smuzhiyun * We are de-swizzling here because the numbers are actually for 348*4882a593Smuzhiyun * port of the root complex virtual P2P bridge. But I want 349*4882a593Smuzhiyun * to avoid putting a node for it in the tree, so the numbers 350*4882a593Smuzhiyun * below are basically de-swizzled numbers. 351*4882a593Smuzhiyun * The real slot is on idsel 0, so the swizzling is 1:1 352*4882a593Smuzhiyun */ 353*4882a593Smuzhiyun interrupt-map-mask = <0x0 0x0 0x0 0x7>; 354*4882a593Smuzhiyun interrupt-map = < 355*4882a593Smuzhiyun 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ 356*4882a593Smuzhiyun 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ 357*4882a593Smuzhiyun 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ 358*4882a593Smuzhiyun 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; 359*4882a593Smuzhiyun }; 360*4882a593Smuzhiyun 361*4882a593Smuzhiyun MSI: ppc4xx-msi@400300000 { 362*4882a593Smuzhiyun compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; 363*4882a593Smuzhiyun reg = < 0x4 0x00300000 0x100 364*4882a593Smuzhiyun 0x4 0x00300000 0x100>; 365*4882a593Smuzhiyun sdr-base = <0x3B0>; 366*4882a593Smuzhiyun msi-data = <0x00000000>; 367*4882a593Smuzhiyun msi-mask = <0x44440000>; 368*4882a593Smuzhiyun interrupt-count = <3>; 369*4882a593Smuzhiyun interrupts =<0 1 2 3>; 370*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 371*4882a593Smuzhiyun #interrupt-cells = <1>; 372*4882a593Smuzhiyun #address-cells = <0>; 373*4882a593Smuzhiyun #size-cells = <0>; 374*4882a593Smuzhiyun interrupt-map = <0 &UIC0 0xC 1 375*4882a593Smuzhiyun 1 &UIC0 0x0D 1 376*4882a593Smuzhiyun 2 &UIC0 0x0E 1 377*4882a593Smuzhiyun 3 &UIC0 0x0F 1>; 378*4882a593Smuzhiyun }; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun }; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun chosen { 384*4882a593Smuzhiyun stdout-path = "/plb/opb/serial@ef600200"; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun}; 388