xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/mpc8349emitxgp.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * MPC8349E-mITX-GP Device Tree Source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2007 Freescale Semiconductor Inc.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "MPC8349EMITXGP";
12*4882a593Smuzhiyun	compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
13*4882a593Smuzhiyun	#address-cells = <1>;
14*4882a593Smuzhiyun	#size-cells = <1>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	aliases {
17*4882a593Smuzhiyun		ethernet0 = &enet0;
18*4882a593Smuzhiyun		serial0 = &serial0;
19*4882a593Smuzhiyun		serial1 = &serial1;
20*4882a593Smuzhiyun		pci0 = &pci0;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	cpus {
24*4882a593Smuzhiyun		#address-cells = <1>;
25*4882a593Smuzhiyun		#size-cells = <0>;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun		PowerPC,8349@0 {
28*4882a593Smuzhiyun			device_type = "cpu";
29*4882a593Smuzhiyun			reg = <0x0>;
30*4882a593Smuzhiyun			d-cache-line-size = <32>;
31*4882a593Smuzhiyun			i-cache-line-size = <32>;
32*4882a593Smuzhiyun			d-cache-size = <32768>;
33*4882a593Smuzhiyun			i-cache-size = <32768>;
34*4882a593Smuzhiyun			timebase-frequency = <0>;	// from bootloader
35*4882a593Smuzhiyun			bus-frequency = <0>;		// from bootloader
36*4882a593Smuzhiyun			clock-frequency = <0>;		// from bootloader
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	memory {
41*4882a593Smuzhiyun		device_type = "memory";
42*4882a593Smuzhiyun		reg = <0x00000000 0x10000000>;
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	soc8349@e0000000 {
46*4882a593Smuzhiyun		#address-cells = <1>;
47*4882a593Smuzhiyun		#size-cells = <1>;
48*4882a593Smuzhiyun		device_type = "soc";
49*4882a593Smuzhiyun		compatible = "simple-bus";
50*4882a593Smuzhiyun		ranges = <0x0 0xe0000000 0x00100000>;
51*4882a593Smuzhiyun		reg = <0xe0000000 0x00000200>;
52*4882a593Smuzhiyun		bus-frequency = <0>;                    // from bootloader
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		wdt@200 {
55*4882a593Smuzhiyun			device_type = "watchdog";
56*4882a593Smuzhiyun			compatible = "mpc83xx_wdt";
57*4882a593Smuzhiyun			reg = <0x200 0x100>;
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		i2c@3000 {
61*4882a593Smuzhiyun			#address-cells = <1>;
62*4882a593Smuzhiyun			#size-cells = <0>;
63*4882a593Smuzhiyun			cell-index = <0>;
64*4882a593Smuzhiyun			compatible = "fsl-i2c";
65*4882a593Smuzhiyun			reg = <0x3000 0x100>;
66*4882a593Smuzhiyun			interrupts = <14 0x8>;
67*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
68*4882a593Smuzhiyun			dfsrr;
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		i2c@3100 {
72*4882a593Smuzhiyun			#address-cells = <1>;
73*4882a593Smuzhiyun			#size-cells = <0>;
74*4882a593Smuzhiyun			cell-index = <1>;
75*4882a593Smuzhiyun			compatible = "fsl-i2c";
76*4882a593Smuzhiyun			reg = <0x3100 0x100>;
77*4882a593Smuzhiyun			interrupts = <15 0x8>;
78*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
79*4882a593Smuzhiyun			dfsrr;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun			rtc@68 {
82*4882a593Smuzhiyun				compatible = "dallas,ds1339";
83*4882a593Smuzhiyun				reg = <0x68>;
84*4882a593Smuzhiyun				interrupts = <18 0x8>;
85*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
86*4882a593Smuzhiyun			};
87*4882a593Smuzhiyun		};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun		spi@7000 {
90*4882a593Smuzhiyun			cell-index = <0>;
91*4882a593Smuzhiyun			compatible = "fsl,spi";
92*4882a593Smuzhiyun			reg = <0x7000 0x1000>;
93*4882a593Smuzhiyun			interrupts = <16 0x8>;
94*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
95*4882a593Smuzhiyun			mode = "cpu";
96*4882a593Smuzhiyun		};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun		dma@82a8 {
99*4882a593Smuzhiyun			#address-cells = <1>;
100*4882a593Smuzhiyun			#size-cells = <1>;
101*4882a593Smuzhiyun			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
102*4882a593Smuzhiyun			reg = <0x82a8 4>;
103*4882a593Smuzhiyun			ranges = <0 0x8100 0x1a8>;
104*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
105*4882a593Smuzhiyun			interrupts = <71 8>;
106*4882a593Smuzhiyun			cell-index = <0>;
107*4882a593Smuzhiyun			dma-channel@0 {
108*4882a593Smuzhiyun				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
109*4882a593Smuzhiyun				reg = <0 0x80>;
110*4882a593Smuzhiyun				cell-index = <0>;
111*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
112*4882a593Smuzhiyun				interrupts = <71 8>;
113*4882a593Smuzhiyun			};
114*4882a593Smuzhiyun			dma-channel@80 {
115*4882a593Smuzhiyun				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
116*4882a593Smuzhiyun				reg = <0x80 0x80>;
117*4882a593Smuzhiyun				cell-index = <1>;
118*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
119*4882a593Smuzhiyun				interrupts = <71 8>;
120*4882a593Smuzhiyun			};
121*4882a593Smuzhiyun			dma-channel@100 {
122*4882a593Smuzhiyun				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
123*4882a593Smuzhiyun				reg = <0x100 0x80>;
124*4882a593Smuzhiyun				cell-index = <2>;
125*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
126*4882a593Smuzhiyun				interrupts = <71 8>;
127*4882a593Smuzhiyun			};
128*4882a593Smuzhiyun			dma-channel@180 {
129*4882a593Smuzhiyun				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
130*4882a593Smuzhiyun				reg = <0x180 0x28>;
131*4882a593Smuzhiyun				cell-index = <3>;
132*4882a593Smuzhiyun				interrupt-parent = <&ipic>;
133*4882a593Smuzhiyun				interrupts = <71 8>;
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun		};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun		usb@23000 {
138*4882a593Smuzhiyun			compatible = "fsl-usb2-dr";
139*4882a593Smuzhiyun			reg = <0x23000 0x1000>;
140*4882a593Smuzhiyun			#address-cells = <1>;
141*4882a593Smuzhiyun			#size-cells = <0>;
142*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
143*4882a593Smuzhiyun			interrupts = <38 0x8>;
144*4882a593Smuzhiyun			dr_mode = "otg";
145*4882a593Smuzhiyun			phy_type = "ulpi";
146*4882a593Smuzhiyun		};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun		enet0: ethernet@24000 {
149*4882a593Smuzhiyun			#address-cells = <1>;
150*4882a593Smuzhiyun			#size-cells = <1>;
151*4882a593Smuzhiyun			cell-index = <0>;
152*4882a593Smuzhiyun			device_type = "network";
153*4882a593Smuzhiyun			model = "TSEC";
154*4882a593Smuzhiyun			compatible = "gianfar";
155*4882a593Smuzhiyun			reg = <0x24000 0x1000>;
156*4882a593Smuzhiyun			ranges = <0x0 0x24000 0x1000>;
157*4882a593Smuzhiyun			local-mac-address = [ 00 00 00 00 00 00 ];
158*4882a593Smuzhiyun			interrupts = <32 0x8 33 0x8 34 0x8>;
159*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
160*4882a593Smuzhiyun			tbi-handle = <&tbi0>;
161*4882a593Smuzhiyun			phy-handle = <&phy1c>;
162*4882a593Smuzhiyun			linux,network-index = <0>;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun			mdio@520 {
165*4882a593Smuzhiyun				#address-cells = <1>;
166*4882a593Smuzhiyun				#size-cells = <0>;
167*4882a593Smuzhiyun				compatible = "fsl,gianfar-mdio";
168*4882a593Smuzhiyun				reg = <0x520 0x20>;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun				/* Vitesse 8201 */
171*4882a593Smuzhiyun				phy1c: ethernet-phy@1c {
172*4882a593Smuzhiyun					interrupt-parent = <&ipic>;
173*4882a593Smuzhiyun					interrupts = <18 0x8>;
174*4882a593Smuzhiyun					reg = <0x1c>;
175*4882a593Smuzhiyun				};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun				tbi0: tbi-phy@11 {
178*4882a593Smuzhiyun					reg = <0x11>;
179*4882a593Smuzhiyun					device_type = "tbi-phy";
180*4882a593Smuzhiyun				};
181*4882a593Smuzhiyun			};
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun		serial0: serial@4500 {
185*4882a593Smuzhiyun			cell-index = <0>;
186*4882a593Smuzhiyun			device_type = "serial";
187*4882a593Smuzhiyun			compatible = "fsl,ns16550", "ns16550";
188*4882a593Smuzhiyun			reg = <0x4500 0x100>;
189*4882a593Smuzhiyun			clock-frequency = <0>;		// from bootloader
190*4882a593Smuzhiyun			interrupts = <9 0x8>;
191*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun		serial1: serial@4600 {
195*4882a593Smuzhiyun			cell-index = <1>;
196*4882a593Smuzhiyun			device_type = "serial";
197*4882a593Smuzhiyun			compatible = "fsl,ns16550", "ns16550";
198*4882a593Smuzhiyun			reg = <0x4600 0x100>;
199*4882a593Smuzhiyun			clock-frequency = <0>;		// from bootloader
200*4882a593Smuzhiyun			interrupts = <10 0x8>;
201*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
202*4882a593Smuzhiyun		};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun		crypto@30000 {
205*4882a593Smuzhiyun			compatible = "fsl,sec2.0";
206*4882a593Smuzhiyun			reg = <0x30000 0x10000>;
207*4882a593Smuzhiyun			interrupts = <11 0x8>;
208*4882a593Smuzhiyun			interrupt-parent = <&ipic>;
209*4882a593Smuzhiyun			fsl,num-channels = <4>;
210*4882a593Smuzhiyun			fsl,channel-fifo-len = <24>;
211*4882a593Smuzhiyun			fsl,exec-units-mask = <0x7e>;
212*4882a593Smuzhiyun			fsl,descriptor-types-mask = <0x01010ebf>;
213*4882a593Smuzhiyun		};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun		ipic: pic@700 {
216*4882a593Smuzhiyun			interrupt-controller;
217*4882a593Smuzhiyun			#address-cells = <0>;
218*4882a593Smuzhiyun			#interrupt-cells = <2>;
219*4882a593Smuzhiyun			reg = <0x700 0x100>;
220*4882a593Smuzhiyun			device_type = "ipic";
221*4882a593Smuzhiyun		};
222*4882a593Smuzhiyun	};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun	pci0: pci@e0008600 {
225*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
226*4882a593Smuzhiyun		interrupt-map = <
227*4882a593Smuzhiyun				/* IDSEL 0x0F - PCI Slot */
228*4882a593Smuzhiyun				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
229*4882a593Smuzhiyun				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
230*4882a593Smuzhiyun				 >;
231*4882a593Smuzhiyun		interrupt-parent = <&ipic>;
232*4882a593Smuzhiyun		interrupts = <67 0x8>;
233*4882a593Smuzhiyun		bus-range = <0x1 0x1>;
234*4882a593Smuzhiyun		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
235*4882a593Smuzhiyun			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
236*4882a593Smuzhiyun			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
237*4882a593Smuzhiyun		clock-frequency = <66666666>;
238*4882a593Smuzhiyun		#interrupt-cells = <1>;
239*4882a593Smuzhiyun		#size-cells = <2>;
240*4882a593Smuzhiyun		#address-cells = <3>;
241*4882a593Smuzhiyun		reg = <0xe0008600 0x100		/* internal registers */
242*4882a593Smuzhiyun		       0xe0008380 0x8>;		/* config space access registers */
243*4882a593Smuzhiyun		compatible = "fsl,mpc8349-pci";
244*4882a593Smuzhiyun		device_type = "pci";
245*4882a593Smuzhiyun	};
246*4882a593Smuzhiyun};
247