1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree for the MGCOGE plattform from keymile 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2008 DENX Software Engineering GmbH 6*4882a593Smuzhiyun * Heiko Schocher <hs@denx.de> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "MGCOGE"; 12*4882a593Smuzhiyun compatible = "keymile,km82xx"; 13*4882a593Smuzhiyun #address-cells = <1>; 14*4882a593Smuzhiyun #size-cells = <1>; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun aliases { 17*4882a593Smuzhiyun ethernet0 = ð0; 18*4882a593Smuzhiyun serial0 = &smc2; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun cpus { 22*4882a593Smuzhiyun #address-cells = <1>; 23*4882a593Smuzhiyun #size-cells = <0>; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun PowerPC,8247@0 { 26*4882a593Smuzhiyun device_type = "cpu"; 27*4882a593Smuzhiyun reg = <0>; 28*4882a593Smuzhiyun d-cache-line-size = <32>; 29*4882a593Smuzhiyun i-cache-line-size = <32>; 30*4882a593Smuzhiyun d-cache-size = <16384>; 31*4882a593Smuzhiyun i-cache-size = <16384>; 32*4882a593Smuzhiyun timebase-frequency = <0>; /* Filled in by U-Boot */ 33*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 34*4882a593Smuzhiyun bus-frequency = <0>; /* Filled in by U-Boot */ 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun localbus@f0010100 { 39*4882a593Smuzhiyun compatible = "fsl,mpc8247-localbus", 40*4882a593Smuzhiyun "fsl,pq2-localbus", 41*4882a593Smuzhiyun "simple-bus"; 42*4882a593Smuzhiyun #address-cells = <2>; 43*4882a593Smuzhiyun #size-cells = <1>; 44*4882a593Smuzhiyun reg = <0xf0010100 0x40>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun ranges = <0 0 0xfe000000 0x00400000 47*4882a593Smuzhiyun 1 0 0x30000000 0x00010000 48*4882a593Smuzhiyun 2 0 0x40000000 0x00010000 49*4882a593Smuzhiyun 5 0 0x50000000 0x04000000 50*4882a593Smuzhiyun >; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun flash@0,0 { 53*4882a593Smuzhiyun compatible = "cfi-flash"; 54*4882a593Smuzhiyun reg = <0 0x0 0x400000>; 55*4882a593Smuzhiyun #address-cells = <1>; 56*4882a593Smuzhiyun #size-cells = <1>; 57*4882a593Smuzhiyun bank-width = <1>; 58*4882a593Smuzhiyun device-width = <1>; 59*4882a593Smuzhiyun partition@0 { 60*4882a593Smuzhiyun label = "u-boot"; 61*4882a593Smuzhiyun reg = <0x00000 0xC0000>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun partition@1 { 64*4882a593Smuzhiyun label = "env"; 65*4882a593Smuzhiyun reg = <0xC0000 0x20000>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun partition@2 { 68*4882a593Smuzhiyun label = "envred"; 69*4882a593Smuzhiyun reg = <0xE0000 0x20000>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun partition@3 { 72*4882a593Smuzhiyun label = "free"; 73*4882a593Smuzhiyun reg = <0x100000 0x300000>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun flash@5,0 { 78*4882a593Smuzhiyun compatible = "cfi-flash"; 79*4882a593Smuzhiyun reg = <5 0x00000000 0x02000000 80*4882a593Smuzhiyun 5 0x02000000 0x02000000>; 81*4882a593Smuzhiyun #address-cells = <1>; 82*4882a593Smuzhiyun #size-cells = <1>; 83*4882a593Smuzhiyun bank-width = <2>; 84*4882a593Smuzhiyun partition@app { /* 64 MBytes */ 85*4882a593Smuzhiyun label = "ubi0"; 86*4882a593Smuzhiyun reg = <0x00000000 0x04000000>; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun memory { 92*4882a593Smuzhiyun device_type = "memory"; 93*4882a593Smuzhiyun reg = <0 0>; /* Filled in by U-Boot */ 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun soc@f0000000 { 97*4882a593Smuzhiyun #address-cells = <1>; 98*4882a593Smuzhiyun #size-cells = <1>; 99*4882a593Smuzhiyun compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus"; 100*4882a593Smuzhiyun ranges = <0x00000000 0xf0000000 0x00053000>; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun // Temporary until code stops depending on it. 103*4882a593Smuzhiyun device_type = "soc"; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun cpm@119c0 { 106*4882a593Smuzhiyun #address-cells = <1>; 107*4882a593Smuzhiyun #size-cells = <1>; 108*4882a593Smuzhiyun #interrupt-cells = <2>; 109*4882a593Smuzhiyun compatible = "fsl,mpc8247-cpm", "fsl,cpm2", 110*4882a593Smuzhiyun "simple-bus"; 111*4882a593Smuzhiyun reg = <0x119c0 0x30>; 112*4882a593Smuzhiyun ranges; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun muram { 115*4882a593Smuzhiyun compatible = "fsl,cpm-muram"; 116*4882a593Smuzhiyun #address-cells = <1>; 117*4882a593Smuzhiyun #size-cells = <1>; 118*4882a593Smuzhiyun ranges = <0 0 0x10000>; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun data@0 { 121*4882a593Smuzhiyun compatible = "fsl,cpm-muram-data"; 122*4882a593Smuzhiyun reg = <0x80 0x1f80 0x9800 0x800>; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun brg@119f0 { 127*4882a593Smuzhiyun compatible = "fsl,mpc8247-brg", 128*4882a593Smuzhiyun "fsl,cpm2-brg", 129*4882a593Smuzhiyun "fsl,cpm-brg"; 130*4882a593Smuzhiyun reg = <0x119f0 0x10 0x115f0 0x10>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun /* Monitor port/SMC2 */ 134*4882a593Smuzhiyun smc2: serial@11a90 { 135*4882a593Smuzhiyun device_type = "serial"; 136*4882a593Smuzhiyun compatible = "fsl,mpc8247-smc-uart", 137*4882a593Smuzhiyun "fsl,cpm2-smc-uart"; 138*4882a593Smuzhiyun reg = <0x11a90 0x20 0x88fc 0x02>; 139*4882a593Smuzhiyun interrupts = <5 8>; 140*4882a593Smuzhiyun interrupt-parent = <&PIC>; 141*4882a593Smuzhiyun fsl,cpm-brg = <2>; 142*4882a593Smuzhiyun fsl,cpm-command = <0x21200000>; 143*4882a593Smuzhiyun current-speed = <0>; /* Filled in by U-Boot */ 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun eth0: ethernet@11a60 { 147*4882a593Smuzhiyun device_type = "network"; 148*4882a593Smuzhiyun compatible = "fsl,mpc8247-scc-enet", 149*4882a593Smuzhiyun "fsl,cpm2-scc-enet"; 150*4882a593Smuzhiyun reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>; 151*4882a593Smuzhiyun local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 152*4882a593Smuzhiyun interrupts = <43 8>; 153*4882a593Smuzhiyun interrupt-parent = <&PIC>; 154*4882a593Smuzhiyun linux,network-index = <0>; 155*4882a593Smuzhiyun fsl,cpm-command = <0xce00000>; 156*4882a593Smuzhiyun fixed-link = <0 0 10 0 0>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun i2c@11860 { 160*4882a593Smuzhiyun compatible = "fsl,mpc8272-i2c", 161*4882a593Smuzhiyun "fsl,cpm2-i2c"; 162*4882a593Smuzhiyun reg = <0x11860 0x20 0x8afc 0x2>; 163*4882a593Smuzhiyun interrupts = <1 8>; 164*4882a593Smuzhiyun interrupt-parent = <&PIC>; 165*4882a593Smuzhiyun fsl,cpm-command = <0x29600000>; 166*4882a593Smuzhiyun #address-cells = <1>; 167*4882a593Smuzhiyun #size-cells = <0>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun mdio@10d40 { 171*4882a593Smuzhiyun compatible = "fsl,cpm2-mdio-bitbang"; 172*4882a593Smuzhiyun reg = <0x10d00 0x14>; 173*4882a593Smuzhiyun #address-cells = <1>; 174*4882a593Smuzhiyun #size-cells = <0>; 175*4882a593Smuzhiyun fsl,mdio-pin = <12>; 176*4882a593Smuzhiyun fsl,mdc-pin = <13>; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun phy0: ethernet-phy@0 { 179*4882a593Smuzhiyun reg = <0x0>; 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun phy1: ethernet-phy@1 { 183*4882a593Smuzhiyun reg = <0x1>; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun /* FCC1 management to switch */ 188*4882a593Smuzhiyun ethernet@11300 { 189*4882a593Smuzhiyun device_type = "network"; 190*4882a593Smuzhiyun compatible = "fsl,cpm2-fcc-enet"; 191*4882a593Smuzhiyun reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>; 192*4882a593Smuzhiyun local-mac-address = [ 00 01 02 03 04 07 ]; 193*4882a593Smuzhiyun interrupts = <32 8>; 194*4882a593Smuzhiyun interrupt-parent = <&PIC>; 195*4882a593Smuzhiyun phy-handle = <&phy0>; 196*4882a593Smuzhiyun linux,network-index = <1>; 197*4882a593Smuzhiyun fsl,cpm-command = <0x12000300>; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun /* FCC2 to redundant core unit over backplane */ 201*4882a593Smuzhiyun ethernet@11320 { 202*4882a593Smuzhiyun device_type = "network"; 203*4882a593Smuzhiyun compatible = "fsl,cpm2-fcc-enet"; 204*4882a593Smuzhiyun reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; 205*4882a593Smuzhiyun local-mac-address = [ 00 01 02 03 04 08 ]; 206*4882a593Smuzhiyun interrupts = <33 8>; 207*4882a593Smuzhiyun interrupt-parent = <&PIC>; 208*4882a593Smuzhiyun phy-handle = <&phy1>; 209*4882a593Smuzhiyun linux,network-index = <2>; 210*4882a593Smuzhiyun fsl,cpm-command = <0x16200300>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun usb@11b60 { 214*4882a593Smuzhiyun compatible = "fsl,mpc8272-cpm-usb"; 215*4882a593Smuzhiyun mode = "peripheral"; 216*4882a593Smuzhiyun reg = <0x11b60 0x40 0x8b00 0x100>; 217*4882a593Smuzhiyun interrupts = <11 8>; 218*4882a593Smuzhiyun interrupt-parent = <&PIC>; 219*4882a593Smuzhiyun usb-clock = <5>; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun spi@11aa0 { 222*4882a593Smuzhiyun cell-index = <0>; 223*4882a593Smuzhiyun compatible = "fsl,spi", "fsl,cpm2-spi"; 224*4882a593Smuzhiyun reg = <0x11a80 0x40 0x89fc 0x2>; 225*4882a593Smuzhiyun interrupts = <2 8>; 226*4882a593Smuzhiyun interrupt-parent = <&PIC>; 227*4882a593Smuzhiyun cs-gpios = < &cpm2_pio_d 19 0>; 228*4882a593Smuzhiyun #address-cells = <1>; 229*4882a593Smuzhiyun #size-cells = <0>; 230*4882a593Smuzhiyun ds3106@1 { 231*4882a593Smuzhiyun compatible = "gen,spidev"; 232*4882a593Smuzhiyun reg = <0>; 233*4882a593Smuzhiyun spi-max-frequency = <8000000>; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun }; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun cpm2_pio_d: gpio-controller@10d60 { 240*4882a593Smuzhiyun #gpio-cells = <2>; 241*4882a593Smuzhiyun compatible = "fsl,cpm2-pario-bank"; 242*4882a593Smuzhiyun reg = <0x10d60 0x14>; 243*4882a593Smuzhiyun gpio-controller; 244*4882a593Smuzhiyun }; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun cpm2_pio_c: gpio-controller@10d40 { 247*4882a593Smuzhiyun #gpio-cells = <2>; 248*4882a593Smuzhiyun compatible = "fsl,cpm2-pario-bank"; 249*4882a593Smuzhiyun reg = <0x10d40 0x14>; 250*4882a593Smuzhiyun gpio-controller; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun PIC: interrupt-controller@10c00 { 254*4882a593Smuzhiyun #interrupt-cells = <2>; 255*4882a593Smuzhiyun interrupt-controller; 256*4882a593Smuzhiyun reg = <0x10c00 0x80>; 257*4882a593Smuzhiyun compatible = "fsl,mpc8247-pic", "fsl,pq2-pic"; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun}; 261