1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Source for AMCC Kilauea (405EX) 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 7*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without 8*4882a593Smuzhiyun * any warranty of any kind, whether express or implied. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun #address-cells = <1>; 15*4882a593Smuzhiyun #size-cells = <1>; 16*4882a593Smuzhiyun model = "amcc,kilauea"; 17*4882a593Smuzhiyun compatible = "amcc,kilauea"; 18*4882a593Smuzhiyun dcr-parent = <&{/cpus/cpu@0}>; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun aliases { 21*4882a593Smuzhiyun ethernet0 = &EMAC0; 22*4882a593Smuzhiyun ethernet1 = &EMAC1; 23*4882a593Smuzhiyun serial0 = &UART0; 24*4882a593Smuzhiyun serial1 = &UART1; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun cpus { 28*4882a593Smuzhiyun #address-cells = <1>; 29*4882a593Smuzhiyun #size-cells = <0>; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun cpu@0 { 32*4882a593Smuzhiyun device_type = "cpu"; 33*4882a593Smuzhiyun model = "PowerPC,405EX"; 34*4882a593Smuzhiyun reg = <0x00000000>; 35*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 36*4882a593Smuzhiyun timebase-frequency = <0>; /* Filled in by U-Boot */ 37*4882a593Smuzhiyun i-cache-line-size = <32>; 38*4882a593Smuzhiyun d-cache-line-size = <32>; 39*4882a593Smuzhiyun i-cache-size = <16384>; /* 16 kB */ 40*4882a593Smuzhiyun d-cache-size = <16384>; /* 16 kB */ 41*4882a593Smuzhiyun dcr-controller; 42*4882a593Smuzhiyun dcr-access-method = "native"; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun memory { 47*4882a593Smuzhiyun device_type = "memory"; 48*4882a593Smuzhiyun reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun UIC0: interrupt-controller { 52*4882a593Smuzhiyun compatible = "ibm,uic-405ex", "ibm,uic"; 53*4882a593Smuzhiyun interrupt-controller; 54*4882a593Smuzhiyun cell-index = <0>; 55*4882a593Smuzhiyun dcr-reg = <0x0c0 0x009>; 56*4882a593Smuzhiyun #address-cells = <0>; 57*4882a593Smuzhiyun #size-cells = <0>; 58*4882a593Smuzhiyun #interrupt-cells = <2>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun UIC1: interrupt-controller1 { 62*4882a593Smuzhiyun compatible = "ibm,uic-405ex","ibm,uic"; 63*4882a593Smuzhiyun interrupt-controller; 64*4882a593Smuzhiyun cell-index = <1>; 65*4882a593Smuzhiyun dcr-reg = <0x0d0 0x009>; 66*4882a593Smuzhiyun #address-cells = <0>; 67*4882a593Smuzhiyun #size-cells = <0>; 68*4882a593Smuzhiyun #interrupt-cells = <2>; 69*4882a593Smuzhiyun interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 70*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun UIC2: interrupt-controller2 { 74*4882a593Smuzhiyun compatible = "ibm,uic-405ex","ibm,uic"; 75*4882a593Smuzhiyun interrupt-controller; 76*4882a593Smuzhiyun cell-index = <2>; 77*4882a593Smuzhiyun dcr-reg = <0x0e0 0x009>; 78*4882a593Smuzhiyun #address-cells = <0>; 79*4882a593Smuzhiyun #size-cells = <0>; 80*4882a593Smuzhiyun #interrupt-cells = <2>; 81*4882a593Smuzhiyun interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ 82*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun CPM0: cpm { 86*4882a593Smuzhiyun compatible = "ibm,cpm"; 87*4882a593Smuzhiyun dcr-access-method = "native"; 88*4882a593Smuzhiyun dcr-reg = <0x0b0 0x003>; 89*4882a593Smuzhiyun unused-units = <0x00000000>; 90*4882a593Smuzhiyun idle-doze = <0x02000000>; 91*4882a593Smuzhiyun standby = <0xe3e74800>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun plb { 95*4882a593Smuzhiyun compatible = "ibm,plb-405ex", "ibm,plb4"; 96*4882a593Smuzhiyun #address-cells = <1>; 97*4882a593Smuzhiyun #size-cells = <1>; 98*4882a593Smuzhiyun ranges; 99*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun SDRAM0: memory-controller { 102*4882a593Smuzhiyun compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; 103*4882a593Smuzhiyun dcr-reg = <0x010 0x002>; 104*4882a593Smuzhiyun interrupt-parent = <&UIC2>; 105*4882a593Smuzhiyun interrupts = <0x5 0x4 /* ECC DED Error */ 106*4882a593Smuzhiyun 0x6 0x4>; /* ECC SEC Error */ 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun CRYPTO: crypto@ef700000 { 110*4882a593Smuzhiyun compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; 111*4882a593Smuzhiyun reg = <0xef700000 0x80400>; 112*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 113*4882a593Smuzhiyun interrupts = <0x17 0x2>; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun MAL0: mcmal { 117*4882a593Smuzhiyun compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 118*4882a593Smuzhiyun dcr-reg = <0x180 0x062>; 119*4882a593Smuzhiyun num-tx-chans = <2>; 120*4882a593Smuzhiyun num-rx-chans = <2>; 121*4882a593Smuzhiyun interrupt-parent = <&MAL0>; 122*4882a593Smuzhiyun interrupts = <0x0 0x1 0x2 0x3 0x4>; 123*4882a593Smuzhiyun #interrupt-cells = <1>; 124*4882a593Smuzhiyun #address-cells = <0>; 125*4882a593Smuzhiyun #size-cells = <0>; 126*4882a593Smuzhiyun interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 127*4882a593Smuzhiyun /*RXEOB*/ 0x1 &UIC0 0xb 0x4 128*4882a593Smuzhiyun /*SERR*/ 0x2 &UIC1 0x0 0x4 129*4882a593Smuzhiyun /*TXDE*/ 0x3 &UIC1 0x1 0x4 130*4882a593Smuzhiyun /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 131*4882a593Smuzhiyun interrupt-map-mask = <0xffffffff>; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun POB0: opb { 135*4882a593Smuzhiyun compatible = "ibm,opb-405ex", "ibm,opb"; 136*4882a593Smuzhiyun #address-cells = <1>; 137*4882a593Smuzhiyun #size-cells = <1>; 138*4882a593Smuzhiyun ranges = <0x80000000 0x80000000 0x10000000 139*4882a593Smuzhiyun 0xef600000 0xef600000 0x00a00000 140*4882a593Smuzhiyun 0xf0000000 0xf0000000 0x10000000>; 141*4882a593Smuzhiyun dcr-reg = <0x0a0 0x005>; 142*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun EBC0: ebc { 145*4882a593Smuzhiyun compatible = "ibm,ebc-405ex", "ibm,ebc"; 146*4882a593Smuzhiyun dcr-reg = <0x012 0x002>; 147*4882a593Smuzhiyun #address-cells = <2>; 148*4882a593Smuzhiyun #size-cells = <1>; 149*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 150*4882a593Smuzhiyun /* ranges property is supplied by U-Boot */ 151*4882a593Smuzhiyun interrupts = <0x5 0x1>; 152*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun nor_flash@0,0 { 155*4882a593Smuzhiyun compatible = "amd,s29gl512n", "cfi-flash"; 156*4882a593Smuzhiyun bank-width = <2>; 157*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x04000000>; 158*4882a593Smuzhiyun #address-cells = <1>; 159*4882a593Smuzhiyun #size-cells = <1>; 160*4882a593Smuzhiyun partition@0 { 161*4882a593Smuzhiyun label = "kernel"; 162*4882a593Smuzhiyun reg = <0x00000000 0x001e0000>; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun partition@1e0000 { 165*4882a593Smuzhiyun label = "dtb"; 166*4882a593Smuzhiyun reg = <0x001e0000 0x00020000>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun partition@200000 { 169*4882a593Smuzhiyun label = "root"; 170*4882a593Smuzhiyun reg = <0x00200000 0x00200000>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun partition@400000 { 173*4882a593Smuzhiyun label = "user"; 174*4882a593Smuzhiyun reg = <0x00400000 0x03b60000>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun partition@3f60000 { 177*4882a593Smuzhiyun label = "env"; 178*4882a593Smuzhiyun reg = <0x03f60000 0x00040000>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun partition@3fa0000 { 181*4882a593Smuzhiyun label = "u-boot"; 182*4882a593Smuzhiyun reg = <0x03fa0000 0x00060000>; 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun ndfc@1,0 { 187*4882a593Smuzhiyun compatible = "ibm,ndfc"; 188*4882a593Smuzhiyun reg = <0x00000001 0x00000000 0x00002000>; 189*4882a593Smuzhiyun ccr = <0x00001000>; 190*4882a593Smuzhiyun bank-settings = <0x80002222>; 191*4882a593Smuzhiyun #address-cells = <1>; 192*4882a593Smuzhiyun #size-cells = <1>; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun nand { 195*4882a593Smuzhiyun #address-cells = <1>; 196*4882a593Smuzhiyun #size-cells = <1>; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun partition@0 { 199*4882a593Smuzhiyun label = "u-boot"; 200*4882a593Smuzhiyun reg = <0x00000000 0x00100000>; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun partition@100000 { 203*4882a593Smuzhiyun label = "user"; 204*4882a593Smuzhiyun reg = <0x00000000 0x03f00000>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun UART0: serial@ef600200 { 211*4882a593Smuzhiyun device_type = "serial"; 212*4882a593Smuzhiyun compatible = "ns16550"; 213*4882a593Smuzhiyun reg = <0xef600200 0x00000008>; 214*4882a593Smuzhiyun virtual-reg = <0xef600200>; 215*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 216*4882a593Smuzhiyun current-speed = <0>; 217*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 218*4882a593Smuzhiyun interrupts = <0x1a 0x4>; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun UART1: serial@ef600300 { 222*4882a593Smuzhiyun device_type = "serial"; 223*4882a593Smuzhiyun compatible = "ns16550"; 224*4882a593Smuzhiyun reg = <0xef600300 0x00000008>; 225*4882a593Smuzhiyun virtual-reg = <0xef600300>; 226*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 227*4882a593Smuzhiyun current-speed = <0>; 228*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 229*4882a593Smuzhiyun interrupts = <0x1 0x4>; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun IIC0: i2c@ef600400 { 233*4882a593Smuzhiyun compatible = "ibm,iic-405ex", "ibm,iic"; 234*4882a593Smuzhiyun reg = <0xef600400 0x00000014>; 235*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 236*4882a593Smuzhiyun interrupts = <0x2 0x4>; 237*4882a593Smuzhiyun #address-cells = <1>; 238*4882a593Smuzhiyun #size-cells = <0>; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun rtc@68 { 241*4882a593Smuzhiyun compatible = "dallas,ds1338"; 242*4882a593Smuzhiyun reg = <0x68>; 243*4882a593Smuzhiyun }; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun dtt@48 { 246*4882a593Smuzhiyun compatible = "dallas,ds1775"; 247*4882a593Smuzhiyun reg = <0x48>; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun IIC1: i2c@ef600500 { 252*4882a593Smuzhiyun compatible = "ibm,iic-405ex", "ibm,iic"; 253*4882a593Smuzhiyun reg = <0xef600500 0x00000014>; 254*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 255*4882a593Smuzhiyun interrupts = <0x7 0x4>; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun RGMII0: emac-rgmii@ef600b00 { 259*4882a593Smuzhiyun compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 260*4882a593Smuzhiyun reg = <0xef600b00 0x00000104>; 261*4882a593Smuzhiyun has-mdio; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun EMAC0: ethernet@ef600900 { 265*4882a593Smuzhiyun linux,network-index = <0x0>; 266*4882a593Smuzhiyun device_type = "network"; 267*4882a593Smuzhiyun compatible = "ibm,emac-405ex", "ibm,emac4sync"; 268*4882a593Smuzhiyun interrupt-parent = <&EMAC0>; 269*4882a593Smuzhiyun interrupts = <0x0 0x1>; 270*4882a593Smuzhiyun #interrupt-cells = <1>; 271*4882a593Smuzhiyun #address-cells = <0>; 272*4882a593Smuzhiyun #size-cells = <0>; 273*4882a593Smuzhiyun interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 274*4882a593Smuzhiyun /*Wake*/ 0x1 &UIC1 0x1d 0x4>; 275*4882a593Smuzhiyun reg = <0xef600900 0x000000c4>; 276*4882a593Smuzhiyun local-mac-address = [000000000000]; /* Filled in by U-Boot */ 277*4882a593Smuzhiyun mal-device = <&MAL0>; 278*4882a593Smuzhiyun mal-tx-channel = <0>; 279*4882a593Smuzhiyun mal-rx-channel = <0>; 280*4882a593Smuzhiyun cell-index = <0>; 281*4882a593Smuzhiyun max-frame-size = <9000>; 282*4882a593Smuzhiyun rx-fifo-size = <4096>; 283*4882a593Smuzhiyun tx-fifo-size = <2048>; 284*4882a593Smuzhiyun rx-fifo-size-gige = <16384>; 285*4882a593Smuzhiyun tx-fifo-size-gige = <16384>; 286*4882a593Smuzhiyun phy-mode = "rgmii"; 287*4882a593Smuzhiyun phy-map = <0x00000000>; 288*4882a593Smuzhiyun rgmii-device = <&RGMII0>; 289*4882a593Smuzhiyun rgmii-channel = <0>; 290*4882a593Smuzhiyun has-inverted-stacr-oc; 291*4882a593Smuzhiyun has-new-stacr-staopc; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun EMAC1: ethernet@ef600a00 { 295*4882a593Smuzhiyun linux,network-index = <0x1>; 296*4882a593Smuzhiyun device_type = "network"; 297*4882a593Smuzhiyun compatible = "ibm,emac-405ex", "ibm,emac4sync"; 298*4882a593Smuzhiyun interrupt-parent = <&EMAC1>; 299*4882a593Smuzhiyun interrupts = <0x0 0x1>; 300*4882a593Smuzhiyun #interrupt-cells = <1>; 301*4882a593Smuzhiyun #address-cells = <0>; 302*4882a593Smuzhiyun #size-cells = <0>; 303*4882a593Smuzhiyun interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 304*4882a593Smuzhiyun /*Wake*/ 0x1 &UIC1 0x1f 0x4>; 305*4882a593Smuzhiyun reg = <0xef600a00 0x000000c4>; 306*4882a593Smuzhiyun local-mac-address = [000000000000]; /* Filled in by U-Boot */ 307*4882a593Smuzhiyun mal-device = <&MAL0>; 308*4882a593Smuzhiyun mal-tx-channel = <1>; 309*4882a593Smuzhiyun mal-rx-channel = <1>; 310*4882a593Smuzhiyun cell-index = <1>; 311*4882a593Smuzhiyun max-frame-size = <9000>; 312*4882a593Smuzhiyun rx-fifo-size = <4096>; 313*4882a593Smuzhiyun tx-fifo-size = <2048>; 314*4882a593Smuzhiyun rx-fifo-size-gige = <16384>; 315*4882a593Smuzhiyun tx-fifo-size-gige = <16384>; 316*4882a593Smuzhiyun phy-mode = "rgmii"; 317*4882a593Smuzhiyun phy-map = <0x00000000>; 318*4882a593Smuzhiyun rgmii-device = <&RGMII0>; 319*4882a593Smuzhiyun rgmii-channel = <1>; 320*4882a593Smuzhiyun has-inverted-stacr-oc; 321*4882a593Smuzhiyun has-new-stacr-staopc; 322*4882a593Smuzhiyun }; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun 325*4882a593Smuzhiyun PCIE0: pcie@a0000000 { 326*4882a593Smuzhiyun device_type = "pci"; 327*4882a593Smuzhiyun #interrupt-cells = <1>; 328*4882a593Smuzhiyun #size-cells = <2>; 329*4882a593Smuzhiyun #address-cells = <3>; 330*4882a593Smuzhiyun compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 331*4882a593Smuzhiyun primary; 332*4882a593Smuzhiyun port = <0x0>; /* port number */ 333*4882a593Smuzhiyun reg = <0xa0000000 0x20000000 /* Config space access */ 334*4882a593Smuzhiyun 0xef000000 0x00001000>; /* Registers */ 335*4882a593Smuzhiyun dcr-reg = <0x040 0x020>; 336*4882a593Smuzhiyun sdr-base = <0x400>; 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun /* Outbound ranges, one memory and one IO, 339*4882a593Smuzhiyun * later cannot be changed 340*4882a593Smuzhiyun */ 341*4882a593Smuzhiyun ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 342*4882a593Smuzhiyun 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun /* Inbound 2GB range starting at 0 */ 345*4882a593Smuzhiyun dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun /* This drives busses 0x00 to 0x3f */ 348*4882a593Smuzhiyun bus-range = <0x0 0x3f>; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun /* Legacy interrupts (note the weird polarity, the bridge seems 351*4882a593Smuzhiyun * to invert PCIe legacy interrupts). 352*4882a593Smuzhiyun * We are de-swizzling here because the numbers are actually for 353*4882a593Smuzhiyun * port of the root complex virtual P2P bridge. But I want 354*4882a593Smuzhiyun * to avoid putting a node for it in the tree, so the numbers 355*4882a593Smuzhiyun * below are basically de-swizzled numbers. 356*4882a593Smuzhiyun * The real slot is on idsel 0, so the swizzling is 1:1 357*4882a593Smuzhiyun */ 358*4882a593Smuzhiyun interrupt-map-mask = <0x0 0x0 0x0 0x7>; 359*4882a593Smuzhiyun interrupt-map = < 360*4882a593Smuzhiyun 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ 361*4882a593Smuzhiyun 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ 362*4882a593Smuzhiyun 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ 363*4882a593Smuzhiyun 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; 364*4882a593Smuzhiyun }; 365*4882a593Smuzhiyun 366*4882a593Smuzhiyun PCIE1: pcie@c0000000 { 367*4882a593Smuzhiyun device_type = "pci"; 368*4882a593Smuzhiyun #interrupt-cells = <1>; 369*4882a593Smuzhiyun #size-cells = <2>; 370*4882a593Smuzhiyun #address-cells = <3>; 371*4882a593Smuzhiyun compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 372*4882a593Smuzhiyun primary; 373*4882a593Smuzhiyun port = <0x1>; /* port number */ 374*4882a593Smuzhiyun reg = <0xc0000000 0x20000000 /* Config space access */ 375*4882a593Smuzhiyun 0xef001000 0x00001000>; /* Registers */ 376*4882a593Smuzhiyun dcr-reg = <0x060 0x020>; 377*4882a593Smuzhiyun sdr-base = <0x440>; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun /* Outbound ranges, one memory and one IO, 380*4882a593Smuzhiyun * later cannot be changed 381*4882a593Smuzhiyun */ 382*4882a593Smuzhiyun ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 383*4882a593Smuzhiyun 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun /* Inbound 2GB range starting at 0 */ 386*4882a593Smuzhiyun dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; 387*4882a593Smuzhiyun 388*4882a593Smuzhiyun /* This drives busses 0x40 to 0x7f */ 389*4882a593Smuzhiyun bus-range = <0x40 0x7f>; 390*4882a593Smuzhiyun 391*4882a593Smuzhiyun /* Legacy interrupts (note the weird polarity, the bridge seems 392*4882a593Smuzhiyun * to invert PCIe legacy interrupts). 393*4882a593Smuzhiyun * We are de-swizzling here because the numbers are actually for 394*4882a593Smuzhiyun * port of the root complex virtual P2P bridge. But I want 395*4882a593Smuzhiyun * to avoid putting a node for it in the tree, so the numbers 396*4882a593Smuzhiyun * below are basically de-swizzled numbers. 397*4882a593Smuzhiyun * The real slot is on idsel 0, so the swizzling is 1:1 398*4882a593Smuzhiyun */ 399*4882a593Smuzhiyun interrupt-map-mask = <0x0 0x0 0x0 0x7>; 400*4882a593Smuzhiyun interrupt-map = < 401*4882a593Smuzhiyun 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ 402*4882a593Smuzhiyun 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ 403*4882a593Smuzhiyun 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ 404*4882a593Smuzhiyun 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun MSI: ppc4xx-msi@C10000000 { 408*4882a593Smuzhiyun compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; 409*4882a593Smuzhiyun reg = <0xEF620000 0x100>; 410*4882a593Smuzhiyun sdr-base = <0x4B0>; 411*4882a593Smuzhiyun msi-data = <0x00000000>; 412*4882a593Smuzhiyun msi-mask = <0x44440000>; 413*4882a593Smuzhiyun interrupt-count = <12>; 414*4882a593Smuzhiyun interrupts = <0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD>; 415*4882a593Smuzhiyun interrupt-parent = <&UIC2>; 416*4882a593Smuzhiyun #interrupt-cells = <1>; 417*4882a593Smuzhiyun #address-cells = <0>; 418*4882a593Smuzhiyun #size-cells = <0>; 419*4882a593Smuzhiyun interrupt-map = <0 &UIC2 0x10 1 420*4882a593Smuzhiyun 1 &UIC2 0x11 1 421*4882a593Smuzhiyun 2 &UIC2 0x12 1 422*4882a593Smuzhiyun 2 &UIC2 0x13 1 423*4882a593Smuzhiyun 2 &UIC2 0x14 1 424*4882a593Smuzhiyun 2 &UIC2 0x15 1 425*4882a593Smuzhiyun 2 &UIC2 0x16 1 426*4882a593Smuzhiyun 2 &UIC2 0x17 1 427*4882a593Smuzhiyun 2 &UIC2 0x18 1 428*4882a593Smuzhiyun 2 &UIC2 0x19 1 429*4882a593Smuzhiyun 2 &UIC2 0x1A 1 430*4882a593Smuzhiyun 2 &UIC2 0x1B 1 431*4882a593Smuzhiyun 2 &UIC2 0x1C 1 432*4882a593Smuzhiyun 3 &UIC2 0x1D 1>; 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun}; 436