xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/iss4xx.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree Source for IBM Embedded PPC 476 Platform
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2010 Torez Smith, IBM Corporation.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Based on earlier code:
7*4882a593Smuzhiyun *    Copyright (c) 2006, 2007 IBM Corp.
8*4882a593Smuzhiyun *    Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
11*4882a593Smuzhiyun * License version 2.  This program is licensed "as is" without
12*4882a593Smuzhiyun * any warranty of any kind, whether express or implied.
13*4882a593Smuzhiyun */
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun/dts-v1/;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun/ {
18*4882a593Smuzhiyun	#address-cells = <2>;
19*4882a593Smuzhiyun	#size-cells = <1>;
20*4882a593Smuzhiyun	model = "ibm,iss-4xx";
21*4882a593Smuzhiyun	compatible = "ibm,iss-4xx";
22*4882a593Smuzhiyun	dcr-parent = <&{/cpus/cpu@0}>;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	aliases {
25*4882a593Smuzhiyun		serial0 = &UART0;
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	cpus {
29*4882a593Smuzhiyun		#address-cells = <1>;
30*4882a593Smuzhiyun		#size-cells = <0>;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		cpu@0 {
33*4882a593Smuzhiyun			device_type = "cpu";
34*4882a593Smuzhiyun			model = "PowerPC,4xx"; // real CPU changed in sim
35*4882a593Smuzhiyun			reg = <0x00000000>;
36*4882a593Smuzhiyun			clock-frequency = <100000000>; // 100Mhz :-)
37*4882a593Smuzhiyun			timebase-frequency = <100000000>;
38*4882a593Smuzhiyun			i-cache-line-size = <32>; // may need fixup in sim
39*4882a593Smuzhiyun			d-cache-line-size = <32>; // may need fixup in sim
40*4882a593Smuzhiyun			i-cache-size = <32768>; /* may need fixup in sim */
41*4882a593Smuzhiyun			d-cache-size = <32768>; /* may need fixup in sim */
42*4882a593Smuzhiyun			dcr-controller;
43*4882a593Smuzhiyun			dcr-access-method = "native";
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun	memory {
48*4882a593Smuzhiyun		device_type = "memory";
49*4882a593Smuzhiyun		reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	UIC0: interrupt-controller0 {
53*4882a593Smuzhiyun		compatible = "ibm,uic-4xx", "ibm,uic";
54*4882a593Smuzhiyun		interrupt-controller;
55*4882a593Smuzhiyun		cell-index = <0>;
56*4882a593Smuzhiyun		dcr-reg = <0x0c0 0x009>;
57*4882a593Smuzhiyun		#address-cells = <0>;
58*4882a593Smuzhiyun		#size-cells = <0>;
59*4882a593Smuzhiyun		#interrupt-cells = <2>;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	UIC1: interrupt-controller1 {
64*4882a593Smuzhiyun		compatible = "ibm,uic-4xx", "ibm,uic";
65*4882a593Smuzhiyun		interrupt-controller;
66*4882a593Smuzhiyun		cell-index = <1>;
67*4882a593Smuzhiyun		dcr-reg = <0x0d0 0x009>;
68*4882a593Smuzhiyun		#address-cells = <0>;
69*4882a593Smuzhiyun		#size-cells = <0>;
70*4882a593Smuzhiyun		#interrupt-cells = <2>;
71*4882a593Smuzhiyun		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
72*4882a593Smuzhiyun		interrupt-parent = <&UIC0>;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	plb {
76*4882a593Smuzhiyun		compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
77*4882a593Smuzhiyun		#address-cells = <2>;
78*4882a593Smuzhiyun		#size-cells = <1>;
79*4882a593Smuzhiyun		ranges;
80*4882a593Smuzhiyun		clock-frequency = <0>; // Filled in by zImage
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		POB0: opb {
83*4882a593Smuzhiyun			compatible = "ibm,opb-4xx", "ibm,opb";
84*4882a593Smuzhiyun			#address-cells = <1>;
85*4882a593Smuzhiyun			#size-cells = <1>;
86*4882a593Smuzhiyun			/* Wish there was a nicer way of specifying a full 32-bit
87*4882a593Smuzhiyun			   range */
88*4882a593Smuzhiyun			ranges = <0x00000000 0x00000001 0x00000000 0x80000000
89*4882a593Smuzhiyun				  0x80000000 0x00000001 0x80000000 0x80000000>;
90*4882a593Smuzhiyun			clock-frequency = <0>; // Filled in by zImage
91*4882a593Smuzhiyun			UART0: serial@40000200 {
92*4882a593Smuzhiyun				device_type = "serial";
93*4882a593Smuzhiyun				compatible = "ns16550a";
94*4882a593Smuzhiyun				reg = <0x40000200 0x00000008>;
95*4882a593Smuzhiyun				virtual-reg = <0xe0000200>;
96*4882a593Smuzhiyun				clock-frequency = <11059200>;
97*4882a593Smuzhiyun				current-speed = <115200>;
98*4882a593Smuzhiyun				interrupt-parent = <&UIC0>;
99*4882a593Smuzhiyun				interrupts = <0x0 0x4>;
100*4882a593Smuzhiyun			};
101*4882a593Smuzhiyun		};
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	nvrtc {
105*4882a593Smuzhiyun		compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
106*4882a593Smuzhiyun		reg = <0 0xEF703000 0x2000>;
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun	iss-block {
109*4882a593Smuzhiyun		compatible = "ibm,iss-sim-block-device";
110*4882a593Smuzhiyun		reg = <0 0xEF701000 0x1000>;
111*4882a593Smuzhiyun	};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	chosen {
114*4882a593Smuzhiyun		stdout-path = "/plb/opb/serial@40000200";
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun};
117