xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsp2.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree Source for FSP2
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2010,2012 IBM Corp.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
7*4882a593Smuzhiyun * License version 2.  This program is licensed "as is" without
8*4882a593Smuzhiyun * any warranty of any kind, whether express or implied.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/dts-v1/;
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	#address-cells = <2>;
16*4882a593Smuzhiyun	#size-cells = <1>;
17*4882a593Smuzhiyun	model = "ibm,fsp2";
18*4882a593Smuzhiyun	compatible = "ibm,fsp2";
19*4882a593Smuzhiyun	dcr-parent = <&{/cpus/cpu@0}>;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	aliases {
22*4882a593Smuzhiyun		ethernet0 = &EMAC0;
23*4882a593Smuzhiyun		ethernet1 = &EMAC1;
24*4882a593Smuzhiyun		serial0 = &UART0;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	cpus {
28*4882a593Smuzhiyun		#address-cells = <1>;
29*4882a593Smuzhiyun		#size-cells = <0>;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		cpu@0 {
32*4882a593Smuzhiyun			device_type = "cpu";
33*4882a593Smuzhiyun			model = "PowerPC, 476FSP2";
34*4882a593Smuzhiyun			reg = <0x0>;
35*4882a593Smuzhiyun			clock-frequency = <0>;    /* Filled in by cuboot */
36*4882a593Smuzhiyun			timebase-frequency = <0>; /* Filled in by cuboot */
37*4882a593Smuzhiyun			i-cache-line-size = <32>;
38*4882a593Smuzhiyun			d-cache-line-size = <32>;
39*4882a593Smuzhiyun			d-cache-size = <32768>;
40*4882a593Smuzhiyun			i-cache-size = <32768>;
41*4882a593Smuzhiyun			dcr-controller;
42*4882a593Smuzhiyun			dcr-access-method = "native";
43*4882a593Smuzhiyun		};
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	memory {
47*4882a593Smuzhiyun		device_type = "memory";
48*4882a593Smuzhiyun		reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by
49*4882a593Smuzhiyun							     cuboot */
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	clocks {
53*4882a593Smuzhiyun		mmc_clk: mmc_clk {
54*4882a593Smuzhiyun			compatible = "fixed-clock";
55*4882a593Smuzhiyun			#clock-cells = <0>;
56*4882a593Smuzhiyun			clock-frequency = <50000000>;
57*4882a593Smuzhiyun			clock-output-names = "mmc_clk";
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	UIC0: uic0 {
62*4882a593Smuzhiyun		#address-cells = <0>;
63*4882a593Smuzhiyun		#size-cells = <0>;
64*4882a593Smuzhiyun		#interrupt-cells = <2>;
65*4882a593Smuzhiyun		compatible = "ibm,uic";
66*4882a593Smuzhiyun		interrupt-controller;
67*4882a593Smuzhiyun		cell-index = <0>;
68*4882a593Smuzhiyun		dcr-reg = <0x2c0 0x8>;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	/* "interrupts" field is <bit level bit level>
72*4882a593Smuzhiyun	   first pair is non-critical, second is critical */
73*4882a593Smuzhiyun	UIC1_0: uic1_0 {
74*4882a593Smuzhiyun		#address-cells = <0>;
75*4882a593Smuzhiyun		#size-cells = <0>;
76*4882a593Smuzhiyun		#interrupt-cells = <2>;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		compatible = "ibm,uic";
79*4882a593Smuzhiyun		interrupt-controller;
80*4882a593Smuzhiyun		cell-index = <1>;
81*4882a593Smuzhiyun		dcr-reg = <0x2c8 0x8>;
82*4882a593Smuzhiyun		interrupt-parent = <&UIC0>;
83*4882a593Smuzhiyun		interrupts = <21 0x4 4 0x84>;
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	/* PSI and DMA */
87*4882a593Smuzhiyun	UIC1_1: uic1_1 {
88*4882a593Smuzhiyun		#address-cells = <0>;
89*4882a593Smuzhiyun		#size-cells = <0>;
90*4882a593Smuzhiyun		#interrupt-cells = <2>;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		compatible = "ibm,uic";
93*4882a593Smuzhiyun		interrupt-controller;
94*4882a593Smuzhiyun		cell-index = <2>;
95*4882a593Smuzhiyun		dcr-reg = <0x350 0x8>;
96*4882a593Smuzhiyun		interrupt-parent = <&UIC0>;
97*4882a593Smuzhiyun		interrupts = <22 0x4 5 0x84>;
98*4882a593Smuzhiyun	};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun	/* Ethernet and USB */
101*4882a593Smuzhiyun	UIC1_2: uic1_2 {
102*4882a593Smuzhiyun		#address-cells = <0>;
103*4882a593Smuzhiyun		#size-cells = <0>;
104*4882a593Smuzhiyun		#interrupt-cells = <2>;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun		compatible = "ibm,uic";
107*4882a593Smuzhiyun		interrupt-controller;
108*4882a593Smuzhiyun		cell-index = <3>;
109*4882a593Smuzhiyun		dcr-reg = <0x358 0x8>;
110*4882a593Smuzhiyun		interrupt-parent = <&UIC0>;
111*4882a593Smuzhiyun		interrupts = <23 0x4 6 0x84>;
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	/* PLB Errors */
115*4882a593Smuzhiyun	UIC1_3: uic1_3 {
116*4882a593Smuzhiyun		#address-cells = <0>;
117*4882a593Smuzhiyun		#size-cells = <0>;
118*4882a593Smuzhiyun		#interrupt-cells = <2>;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		compatible = "ibm,uic";
121*4882a593Smuzhiyun		interrupt-controller;
122*4882a593Smuzhiyun		cell-index = <4>;
123*4882a593Smuzhiyun		dcr-reg = <0x360 0x8>;
124*4882a593Smuzhiyun		interrupt-parent = <&UIC0>;
125*4882a593Smuzhiyun		interrupts = <24 0x4 7 0x84>;
126*4882a593Smuzhiyun	};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun	UIC1_4: uic1_4 {
129*4882a593Smuzhiyun		#address-cells = <0>;
130*4882a593Smuzhiyun		#size-cells = <0>;
131*4882a593Smuzhiyun		#interrupt-cells = <2>;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun		compatible = "ibm,uic";
134*4882a593Smuzhiyun		interrupt-controller;
135*4882a593Smuzhiyun		cell-index = <5>;
136*4882a593Smuzhiyun		dcr-reg = <0x368 0x8>;
137*4882a593Smuzhiyun		interrupt-parent = <&UIC0>;
138*4882a593Smuzhiyun		interrupts = <25 0x4 8 0x84>;
139*4882a593Smuzhiyun	};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun	UIC1_5: uic1_5 {
142*4882a593Smuzhiyun		#address-cells = <0>;
143*4882a593Smuzhiyun		#size-cells = <0>;
144*4882a593Smuzhiyun		#interrupt-cells = <2>;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun		compatible = "ibm,uic";
147*4882a593Smuzhiyun		interrupt-controller;
148*4882a593Smuzhiyun		cell-index = <6>;
149*4882a593Smuzhiyun		dcr-reg = <0x370 0x8>;
150*4882a593Smuzhiyun		interrupt-parent = <&UIC0>;
151*4882a593Smuzhiyun		interrupts = <26 0x4 9 0x84>;
152*4882a593Smuzhiyun	};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun	/* 2nd level UICs for FSI */
155*4882a593Smuzhiyun	UIC2_0: uic2_0 {
156*4882a593Smuzhiyun		#address-cells = <0>;
157*4882a593Smuzhiyun		#size-cells = <0>;
158*4882a593Smuzhiyun		#interrupt-cells = <2>;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun		compatible = "ibm,uic";
161*4882a593Smuzhiyun		interrupt-controller;
162*4882a593Smuzhiyun		cell-index = <7>;
163*4882a593Smuzhiyun		dcr-reg = <0x2d0 0x8>;
164*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
165*4882a593Smuzhiyun		interrupts = <16 0x4 0 0x84>;
166*4882a593Smuzhiyun	};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	UIC2_1: uic2_1 {
169*4882a593Smuzhiyun		#address-cells = <0>;
170*4882a593Smuzhiyun		#size-cells = <0>;
171*4882a593Smuzhiyun		#interrupt-cells = <2>;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun		compatible = "ibm,uic";
174*4882a593Smuzhiyun		interrupt-controller;
175*4882a593Smuzhiyun		cell-index = <8>;
176*4882a593Smuzhiyun		dcr-reg = <0x2d8 0x8>;
177*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
178*4882a593Smuzhiyun		interrupts = <17 0x4 1 0x84>;
179*4882a593Smuzhiyun	};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun	UIC2_2: uic2_2 {
182*4882a593Smuzhiyun		#address-cells = <0>;
183*4882a593Smuzhiyun		#size-cells = <0>;
184*4882a593Smuzhiyun		#interrupt-cells = <2>;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun		compatible = "ibm,uic";
187*4882a593Smuzhiyun		interrupt-controller;
188*4882a593Smuzhiyun		cell-index = <9>;
189*4882a593Smuzhiyun		dcr-reg = <0x2e0 0x8>;
190*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
191*4882a593Smuzhiyun		interrupts = <18 0x4 2 0x84>;
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun	UIC2_3: uic2_3 {
195*4882a593Smuzhiyun		#address-cells = <0>;
196*4882a593Smuzhiyun		#size-cells = <0>;
197*4882a593Smuzhiyun		#interrupt-cells = <2>;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun		compatible = "ibm,uic";
200*4882a593Smuzhiyun		interrupt-controller;
201*4882a593Smuzhiyun		cell-index = <10>;
202*4882a593Smuzhiyun		dcr-reg = <0x2e8 0x8>;
203*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
204*4882a593Smuzhiyun		interrupts = <19 0x4 3 0x84>;
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun	UIC2_4: uic2_4 {
208*4882a593Smuzhiyun		#address-cells = <0>;
209*4882a593Smuzhiyun		#size-cells = <0>;
210*4882a593Smuzhiyun		#interrupt-cells = <2>;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun		compatible = "ibm,uic";
213*4882a593Smuzhiyun		interrupt-controller;
214*4882a593Smuzhiyun		cell-index = <11>;
215*4882a593Smuzhiyun		dcr-reg = <0x2f0 0x8>;
216*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
217*4882a593Smuzhiyun		interrupts = <20 0x4 4 0x84>;
218*4882a593Smuzhiyun	};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun	UIC2_5: uic2_5 {
221*4882a593Smuzhiyun		#address-cells = <0>;
222*4882a593Smuzhiyun		#size-cells = <0>;
223*4882a593Smuzhiyun		#interrupt-cells = <2>;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun		compatible = "ibm,uic";
226*4882a593Smuzhiyun		interrupt-controller;
227*4882a593Smuzhiyun		cell-index = <12>;
228*4882a593Smuzhiyun		dcr-reg = <0x2f8 0x8>;
229*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
230*4882a593Smuzhiyun		interrupts = <21 0x4 5 0x84>;
231*4882a593Smuzhiyun	};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun	UIC2_6: uic2_6 {
234*4882a593Smuzhiyun		#address-cells = <0>;
235*4882a593Smuzhiyun		#size-cells = <0>;
236*4882a593Smuzhiyun		#interrupt-cells = <2>;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun		compatible = "ibm,uic";
239*4882a593Smuzhiyun		interrupt-controller;
240*4882a593Smuzhiyun		cell-index = <13>;
241*4882a593Smuzhiyun		dcr-reg = <0x300 0x8>;
242*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
243*4882a593Smuzhiyun		interrupts = <22 0x4 6 0x84>;
244*4882a593Smuzhiyun	};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun	UIC2_7: uic2_7 {
247*4882a593Smuzhiyun		#address-cells = <0>;
248*4882a593Smuzhiyun		#size-cells = <0>;
249*4882a593Smuzhiyun		#interrupt-cells = <2>;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun		compatible = "ibm,uic";
252*4882a593Smuzhiyun		interrupt-controller;
253*4882a593Smuzhiyun		cell-index = <14>;
254*4882a593Smuzhiyun		dcr-reg = <0x308 0x8>;
255*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
256*4882a593Smuzhiyun		interrupts = <23 0x4 7 0x84>;
257*4882a593Smuzhiyun	};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun	UIC2_8: uic2_8 {
260*4882a593Smuzhiyun		#address-cells = <0>;
261*4882a593Smuzhiyun		#size-cells = <0>;
262*4882a593Smuzhiyun		#interrupt-cells = <2>;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun		compatible = "ibm,uic";
265*4882a593Smuzhiyun		interrupt-controller;
266*4882a593Smuzhiyun		cell-index = <15>;
267*4882a593Smuzhiyun		dcr-reg = <0x310 0x8>;
268*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
269*4882a593Smuzhiyun		interrupts = <24 0x4 8 0x84>;
270*4882a593Smuzhiyun	};
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun	UIC2_9: uic2_9 {
273*4882a593Smuzhiyun		#address-cells = <0>;
274*4882a593Smuzhiyun		#size-cells = <0>;
275*4882a593Smuzhiyun		#interrupt-cells = <2>;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun		compatible = "ibm,uic";
278*4882a593Smuzhiyun		interrupt-controller;
279*4882a593Smuzhiyun		cell-index = <16>;
280*4882a593Smuzhiyun		dcr-reg = <0x318 0x8>;
281*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
282*4882a593Smuzhiyun		interrupts = <25 0x4 9 0x84>;
283*4882a593Smuzhiyun	};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun	UIC2_10: uic2_10 {
286*4882a593Smuzhiyun		#address-cells = <0>;
287*4882a593Smuzhiyun		#size-cells = <0>;
288*4882a593Smuzhiyun		#interrupt-cells = <2>;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun		compatible = "ibm,uic";
291*4882a593Smuzhiyun		interrupt-controller;
292*4882a593Smuzhiyun		cell-index = <17>;
293*4882a593Smuzhiyun		dcr-reg = <0x320 0x8>;
294*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
295*4882a593Smuzhiyun		interrupts = <26 0x4 10 0x84>;
296*4882a593Smuzhiyun	};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun	UIC2_11: uic2_11 {
299*4882a593Smuzhiyun		#address-cells = <0>;
300*4882a593Smuzhiyun		#size-cells = <0>;
301*4882a593Smuzhiyun		#interrupt-cells = <2>;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun		compatible = "ibm,uic";
304*4882a593Smuzhiyun		interrupt-controller;
305*4882a593Smuzhiyun		cell-index = <18>;
306*4882a593Smuzhiyun		dcr-reg = <0x328 0x8>;
307*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
308*4882a593Smuzhiyun		interrupts = <27 0x4 11 0x84>;
309*4882a593Smuzhiyun	};
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun	UIC2_12: uic2_12 {
312*4882a593Smuzhiyun		#address-cells = <0>;
313*4882a593Smuzhiyun		#size-cells = <0>;
314*4882a593Smuzhiyun		#interrupt-cells = <2>;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun		compatible = "ibm,uic";
317*4882a593Smuzhiyun		interrupt-controller;
318*4882a593Smuzhiyun		cell-index = <19>;
319*4882a593Smuzhiyun		dcr-reg = <0x330 0x8>;
320*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
321*4882a593Smuzhiyun		interrupts = <28 0x4 12 0x84>;
322*4882a593Smuzhiyun	};
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun	UIC2_13: uic2_13 {
325*4882a593Smuzhiyun		#address-cells = <0>;
326*4882a593Smuzhiyun		#size-cells = <0>;
327*4882a593Smuzhiyun		#interrupt-cells = <2>;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun		compatible = "ibm,uic";
330*4882a593Smuzhiyun		interrupt-controller;
331*4882a593Smuzhiyun		cell-index = <20>;
332*4882a593Smuzhiyun		dcr-reg = <0x338 0x8>;
333*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
334*4882a593Smuzhiyun		interrupts = <29 0x4 13 0x84>;
335*4882a593Smuzhiyun	};
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun	UIC2_14: uic2_14 {
338*4882a593Smuzhiyun		#address-cells = <0>;
339*4882a593Smuzhiyun		#size-cells = <0>;
340*4882a593Smuzhiyun		#interrupt-cells = <2>;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun		compatible = "ibm,uic";
343*4882a593Smuzhiyun		interrupt-controller;
344*4882a593Smuzhiyun		cell-index = <21>;
345*4882a593Smuzhiyun		dcr-reg = <0x340 0x8>;
346*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
347*4882a593Smuzhiyun		interrupts = <30 0x4 14 0x84>;
348*4882a593Smuzhiyun	};
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun	UIC2_15: uic2_15 {
351*4882a593Smuzhiyun		#address-cells = <0>;
352*4882a593Smuzhiyun		#size-cells = <0>;
353*4882a593Smuzhiyun		#interrupt-cells = <2>;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun		compatible = "ibm,uic";
356*4882a593Smuzhiyun		interrupt-controller;
357*4882a593Smuzhiyun		cell-index = <22>;
358*4882a593Smuzhiyun		dcr-reg = <0x348 0x8>;
359*4882a593Smuzhiyun		interrupt-parent = <&UIC1_0>;
360*4882a593Smuzhiyun		interrupts = <31 0x4 15 0x84>;
361*4882a593Smuzhiyun	};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun	plb6 {
364*4882a593Smuzhiyun		compatible = "ibm,plb6";
365*4882a593Smuzhiyun		#address-cells = <2>;
366*4882a593Smuzhiyun		#size-cells = <1>;
367*4882a593Smuzhiyun		ranges;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun		MCW0: memory-controller-wrapper {
370*4882a593Smuzhiyun			compatible = "ibm,cw-476fsp2";
371*4882a593Smuzhiyun			dcr-reg = <0x11111800 0x40>;
372*4882a593Smuzhiyun		};
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun		MCIF0: memory-controller {
375*4882a593Smuzhiyun			compatible = "ibm,sdram-476fsp2", "ibm,sdram-4xx-ddr3";
376*4882a593Smuzhiyun			dcr-reg = <0x11120000 0x10000>;
377*4882a593Smuzhiyun			mcer-device = <&MCW0>;
378*4882a593Smuzhiyun			interrupt-parent = <&UIC0>;
379*4882a593Smuzhiyun			interrupts = <10 0x84   /* ECC UE */
380*4882a593Smuzhiyun				      11 0x84>; /* ECC CE */
381*4882a593Smuzhiyun		};
382*4882a593Smuzhiyun	};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun	plb4 {
385*4882a593Smuzhiyun		compatible = "ibm,plb4";
386*4882a593Smuzhiyun		#address-cells = <1>;
387*4882a593Smuzhiyun		#size-cells = <1>;
388*4882a593Smuzhiyun		ranges = <0x00000000 0x00000010 0x00000000 0x80000000
389*4882a593Smuzhiyun			  0x80000000 0x00000010 0x80000000 0x80000000>;
390*4882a593Smuzhiyun		clock-frequency = <333333334>;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun		plb6-system-hung-irq {
393*4882a593Smuzhiyun			compatible = "ibm,bus-error-irq";
394*4882a593Smuzhiyun			#interrupt-cells = <2>;
395*4882a593Smuzhiyun			interrupt-parent = <&UIC0>;
396*4882a593Smuzhiyun			interrupts = <0 0x84>;
397*4882a593Smuzhiyun		};
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun		l2-error-irq {
400*4882a593Smuzhiyun			compatible = "ibm,bus-error-irq";
401*4882a593Smuzhiyun			#interrupt-cells = <2>;
402*4882a593Smuzhiyun			interrupt-parent = <&UIC0>;
403*4882a593Smuzhiyun			interrupts = <20 0x84>;
404*4882a593Smuzhiyun		};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun		plb6-plb4-irq {
407*4882a593Smuzhiyun			compatible = "ibm,bus-error-irq";
408*4882a593Smuzhiyun			#interrupt-cells = <2>;
409*4882a593Smuzhiyun			interrupt-parent = <&UIC0>;
410*4882a593Smuzhiyun			interrupts = <1 0x84>;
411*4882a593Smuzhiyun		};
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun		plb4-ahb-irq {
414*4882a593Smuzhiyun			compatible = "ibm,bus-error-irq";
415*4882a593Smuzhiyun			#interrupt-cells = <2>;
416*4882a593Smuzhiyun			interrupt-parent = <&UIC1_3>;
417*4882a593Smuzhiyun			interrupts = <20 0x84>;
418*4882a593Smuzhiyun		};
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun		opbd-error-irq {
421*4882a593Smuzhiyun			compatible = "ibm,opbd-error-irq";
422*4882a593Smuzhiyun			#interrupt-cells = <2>;
423*4882a593Smuzhiyun			interrupt-parent = <&UIC1_4>;
424*4882a593Smuzhiyun			interrupts = <5 0x84>;
425*4882a593Smuzhiyun		};
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun		cmu-error-irq {
428*4882a593Smuzhiyun			compatible = "ibm,cmu-error-irq";
429*4882a593Smuzhiyun			#interrupt-cells = <2>;
430*4882a593Smuzhiyun			interrupt-parent = <&UIC0>;
431*4882a593Smuzhiyun			interrupts = <28 0x84>;
432*4882a593Smuzhiyun		};
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun		conf-error-irq {
435*4882a593Smuzhiyun			compatible = "ibm,conf-error-irq";
436*4882a593Smuzhiyun			#interrupt-cells = <2>;
437*4882a593Smuzhiyun			interrupt-parent = <&UIC1_4>;
438*4882a593Smuzhiyun			interrupts = <11 0x84>;
439*4882a593Smuzhiyun		};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun		mc-ue-irq {
442*4882a593Smuzhiyun			compatible = "ibm,mc-ue-irq";
443*4882a593Smuzhiyun			#interrupt-cells = <2>;
444*4882a593Smuzhiyun			interrupt-parent = <&UIC0>;
445*4882a593Smuzhiyun			interrupts = <10 0x84>;
446*4882a593Smuzhiyun		};
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun		reset-warning-irq {
449*4882a593Smuzhiyun			compatible = "ibm,reset-warning-irq";
450*4882a593Smuzhiyun			#interrupt-cells = <2>;
451*4882a593Smuzhiyun			interrupt-parent = <&UIC0>;
452*4882a593Smuzhiyun			interrupts = <17 0x84>;
453*4882a593Smuzhiyun		};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun		MAL0: mcmal0 {
456*4882a593Smuzhiyun			#interrupt-cells = <1>;
457*4882a593Smuzhiyun			#address-cells = <0>;
458*4882a593Smuzhiyun			#size-cells = <0>;
459*4882a593Smuzhiyun			compatible = "ibm,mcmal";
460*4882a593Smuzhiyun			dcr-reg = <0x80 0x80>;
461*4882a593Smuzhiyun			num-tx-chans = <1>;
462*4882a593Smuzhiyun			num-rx-chans = <1>;
463*4882a593Smuzhiyun			interrupt-parent = <&MAL0>;
464*4882a593Smuzhiyun			interrupts = <0 1 2 3 4>;
465*4882a593Smuzhiyun			/* index interrupt-parent interrupt# type */
466*4882a593Smuzhiyun			interrupt-map = </*TXEOB*/ 0 &UIC1_2 4 0x4
467*4882a593Smuzhiyun					 /*RXEOB*/ 1 &UIC1_2 3 0x4
468*4882a593Smuzhiyun					 /*SERR*/  2 &UIC1_2 7 0x4
469*4882a593Smuzhiyun					 /*TXDE*/  3 &UIC1_2 6 0x4
470*4882a593Smuzhiyun					 /*RXDE*/  4 &UIC1_2 5 0x4>;
471*4882a593Smuzhiyun		};
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun		MAL1: mcmal1 {
474*4882a593Smuzhiyun			#interrupt-cells = <1>;
475*4882a593Smuzhiyun			#address-cells = <0>;
476*4882a593Smuzhiyun			#size-cells = <0>;
477*4882a593Smuzhiyun			compatible = "ibm,mcmal";
478*4882a593Smuzhiyun			dcr-reg = <0x100 0x80>;
479*4882a593Smuzhiyun			num-tx-chans = <1>;
480*4882a593Smuzhiyun			num-rx-chans = <1>;
481*4882a593Smuzhiyun			interrupt-parent = <&MAL1>;
482*4882a593Smuzhiyun			interrupts = <0 1 2 3 4>;
483*4882a593Smuzhiyun			/* index interrupt-parent interrupt# type */
484*4882a593Smuzhiyun			interrupt-map = </*TXEOB*/ 0 &UIC1_2 12 0x4
485*4882a593Smuzhiyun					 /*RXEOB*/ 1 &UIC1_2 11 0x4
486*4882a593Smuzhiyun					 /*SERR*/  2 &UIC1_2 15 0x4
487*4882a593Smuzhiyun					 /*TXDE*/  3 &UIC1_2 14 0x4
488*4882a593Smuzhiyun					 /*RXDE*/  4 &UIC1_2 13 0x4>;
489*4882a593Smuzhiyun		};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun		mmc0: mmc@20c0000 {
492*4882a593Smuzhiyun			compatible	= "st,sdhci-stih407", "st,sdhci";
493*4882a593Smuzhiyun			reg		= <0x020c0000 0x20000>;
494*4882a593Smuzhiyun			reg-names	= "mmc";
495*4882a593Smuzhiyun			interrupts	= <21 0x4>;
496*4882a593Smuzhiyun			interrupt-parent = <&UIC1_3>;
497*4882a593Smuzhiyun			interrupt-names	= "mmcirq";
498*4882a593Smuzhiyun			pinctrl-names	= "default";
499*4882a593Smuzhiyun			pinctrl-0	= <>;
500*4882a593Smuzhiyun			clock-names	= "mmc";
501*4882a593Smuzhiyun			clocks		= <&mmc_clk>;
502*4882a593Smuzhiyun			bus-width	= <4>;
503*4882a593Smuzhiyun			non-removable;
504*4882a593Smuzhiyun			sd-uhs-sdr50;
505*4882a593Smuzhiyun			sd-uhs-sdr104;
506*4882a593Smuzhiyun			sd-uhs-ddr50;
507*4882a593Smuzhiyun		};
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun		opb {
510*4882a593Smuzhiyun			compatible = "ibm,opb";
511*4882a593Smuzhiyun			#address-cells = <1>;
512*4882a593Smuzhiyun			#size-cells = <1>;
513*4882a593Smuzhiyun			ranges; // pass-thru to parent bus
514*4882a593Smuzhiyun			clock-frequency = <83333334>;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun			EMAC0: ethernet@b0000000 {
517*4882a593Smuzhiyun				linux,network-index = <0>;
518*4882a593Smuzhiyun				device_type = "network";
519*4882a593Smuzhiyun				compatible = "ibm,emac4sync";
520*4882a593Smuzhiyun				has-inverted-stacr-oc;
521*4882a593Smuzhiyun				interrupt-parent = <&UIC1_2>;
522*4882a593Smuzhiyun				interrupts = <1 0x4 0 0x4>;
523*4882a593Smuzhiyun				reg = <0xb0000000 0x100>;
524*4882a593Smuzhiyun				local-mac-address = [000000000000]; /* Filled in by
525*4882a593Smuzhiyun							       cuboot */
526*4882a593Smuzhiyun				mal-device = <&MAL0>;
527*4882a593Smuzhiyun				mal-tx-channel = <0>;
528*4882a593Smuzhiyun				mal-rx-channel = <0>;
529*4882a593Smuzhiyun				cell-index = <0>;
530*4882a593Smuzhiyun				max-frame-size = <1500>;
531*4882a593Smuzhiyun				rx-fifo-size = <4096>;
532*4882a593Smuzhiyun				tx-fifo-size = <4096>;
533*4882a593Smuzhiyun				rx-fifo-size-gige = <16384>;
534*4882a593Smuzhiyun				tx-fifo-size-gige = <8192>;
535*4882a593Smuzhiyun				phy-address = <1>;
536*4882a593Smuzhiyun				phy-mode = "rgmii";
537*4882a593Smuzhiyun				phy-map = <00000003>;
538*4882a593Smuzhiyun				rgmii-device = <&RGMII>;
539*4882a593Smuzhiyun				rgmii-channel = <0>;
540*4882a593Smuzhiyun			};
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun			EMAC1: ethernet@b0000100 {
543*4882a593Smuzhiyun				linux,network-index = <1>;
544*4882a593Smuzhiyun				device_type = "network";
545*4882a593Smuzhiyun				compatible = "ibm,emac4sync";
546*4882a593Smuzhiyun				has-inverted-stacr-oc;
547*4882a593Smuzhiyun				interrupt-parent = <&UIC1_2>;
548*4882a593Smuzhiyun				interrupts = <9 0x4 8 0x4>;
549*4882a593Smuzhiyun				reg = <0xb0000100 0x100>;
550*4882a593Smuzhiyun				local-mac-address = [000000000000]; /* Filled in by
551*4882a593Smuzhiyun							       cuboot */
552*4882a593Smuzhiyun				mal-device = <&MAL1>;
553*4882a593Smuzhiyun				mal-tx-channel = <0>;
554*4882a593Smuzhiyun				mal-rx-channel = <0>;
555*4882a593Smuzhiyun				cell-index = <1>;
556*4882a593Smuzhiyun				max-frame-size = <1500>;
557*4882a593Smuzhiyun				rx-fifo-size = <4096>;
558*4882a593Smuzhiyun				tx-fifo-size = <4096>;
559*4882a593Smuzhiyun				rx-fifo-size-gige = <16384>;
560*4882a593Smuzhiyun				tx-fifo-size-gige = <8192>;
561*4882a593Smuzhiyun				phy-address = <2>;
562*4882a593Smuzhiyun				phy-mode = "rgmii";
563*4882a593Smuzhiyun				phy-map = <00000003>;
564*4882a593Smuzhiyun				rgmii-device = <&RGMII>;
565*4882a593Smuzhiyun				rgmii-channel = <1>;
566*4882a593Smuzhiyun			};
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun			RGMII: rgmii@b0000600 {
569*4882a593Smuzhiyun				compatible = "ibm,rgmii";
570*4882a593Smuzhiyun				has-mdio;
571*4882a593Smuzhiyun				reg = <0xb0000600 0x8>;
572*4882a593Smuzhiyun			};
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun			UART0: serial@b0020000 {
575*4882a593Smuzhiyun				device_type = "serial";
576*4882a593Smuzhiyun				compatible = "ns16550";
577*4882a593Smuzhiyun				reg = <0xb0020000 0x8>;
578*4882a593Smuzhiyun				virtual-reg = <0xb0020000>;
579*4882a593Smuzhiyun				clock-frequency = <20833333>;
580*4882a593Smuzhiyun				current-speed = <115200>;
581*4882a593Smuzhiyun				interrupt-parent = <&UIC0>;
582*4882a593Smuzhiyun				interrupts = <31 0x4>;
583*4882a593Smuzhiyun			};
584*4882a593Smuzhiyun		};
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun		OHCI1: ohci@2040000 {
587*4882a593Smuzhiyun			compatible = "ohci-le";
588*4882a593Smuzhiyun			reg = <0x02040000 0xa0>;
589*4882a593Smuzhiyun			interrupt-parent = <&UIC1_3>;
590*4882a593Smuzhiyun			interrupts = <28 0x8 29 0x8>;
591*4882a593Smuzhiyun		};
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun		OHCI2: ohci@2080000 {
594*4882a593Smuzhiyun			compatible = "ohci-le";
595*4882a593Smuzhiyun			reg = <0x02080000 0xa0>;
596*4882a593Smuzhiyun			interrupt-parent = <&UIC1_3>;
597*4882a593Smuzhiyun			interrupts = <30 0x8 31 0x8>;
598*4882a593Smuzhiyun		};
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun		EHCI: ehci@2000000 {
601*4882a593Smuzhiyun			compatible = "usb-ehci";
602*4882a593Smuzhiyun			reg = <0x02000000 0xa4>;
603*4882a593Smuzhiyun			interrupt-parent = <&UIC1_3>;
604*4882a593Smuzhiyun			interrupts = <23 0x4>;
605*4882a593Smuzhiyun		};
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun	};
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun	chosen {
610*4882a593Smuzhiyun		stdout-path = "/plb/opb/serial@b0020000";
611*4882a593Smuzhiyun		bootargs = "console=ttyS0,115200 rw log_buf_len=32768 debug";
612*4882a593Smuzhiyun	};
613*4882a593Smuzhiyun};
614