1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * T1023 Silicon/SoC Device Tree Source (post include) 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2014 Freescale Semiconductor Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met: 8*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 9*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 10*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 11*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in the 12*4882a593Smuzhiyun * documentation and/or other materials provided with the distribution. 13*4882a593Smuzhiyun * * Neither the name of Freescale Semiconductor nor the 14*4882a593Smuzhiyun * names of its contributors may be used to endorse or promote products 15*4882a593Smuzhiyun * derived from this software without specific prior written permission. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the 19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software 20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any 21*4882a593Smuzhiyun * later version. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun#include <dt-bindings/thermal/thermal.h> 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun&bman_fbpr { 38*4882a593Smuzhiyun compatible = "fsl,bman-fbpr"; 39*4882a593Smuzhiyun alloc-ranges = <0 0 0x10000 0>; 40*4882a593Smuzhiyun}; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun&qman_fqd { 43*4882a593Smuzhiyun compatible = "fsl,qman-fqd"; 44*4882a593Smuzhiyun alloc-ranges = <0 0 0x10000 0>; 45*4882a593Smuzhiyun}; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun&qman_pfdr { 48*4882a593Smuzhiyun compatible = "fsl,qman-pfdr"; 49*4882a593Smuzhiyun alloc-ranges = <0 0 0x10000 0>; 50*4882a593Smuzhiyun}; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun&ifc { 53*4882a593Smuzhiyun #address-cells = <2>; 54*4882a593Smuzhiyun #size-cells = <1>; 55*4882a593Smuzhiyun compatible = "fsl,ifc", "simple-bus"; 56*4882a593Smuzhiyun interrupts = <25 2 0 0>; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&pci0 { 60*4882a593Smuzhiyun compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 61*4882a593Smuzhiyun device_type = "pci"; 62*4882a593Smuzhiyun #size-cells = <2>; 63*4882a593Smuzhiyun #address-cells = <3>; 64*4882a593Smuzhiyun bus-range = <0x0 0xff>; 65*4882a593Smuzhiyun interrupts = <20 2 0 0>; 66*4882a593Smuzhiyun fsl,iommu-parent = <&pamu0>; 67*4882a593Smuzhiyun pcie@0 { 68*4882a593Smuzhiyun reg = <0 0 0 0 0>; 69*4882a593Smuzhiyun #interrupt-cells = <1>; 70*4882a593Smuzhiyun #size-cells = <2>; 71*4882a593Smuzhiyun #address-cells = <3>; 72*4882a593Smuzhiyun device_type = "pci"; 73*4882a593Smuzhiyun interrupts = <20 2 0 0>; 74*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 7>; 75*4882a593Smuzhiyun interrupt-map = < 76*4882a593Smuzhiyun /* IDSEL 0x0 */ 77*4882a593Smuzhiyun 0000 0 0 1 &mpic 40 1 0 0 78*4882a593Smuzhiyun 0000 0 0 2 &mpic 1 1 0 0 79*4882a593Smuzhiyun 0000 0 0 3 &mpic 2 1 0 0 80*4882a593Smuzhiyun 0000 0 0 4 &mpic 3 1 0 0 81*4882a593Smuzhiyun >; 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun}; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun&pci1 { 86*4882a593Smuzhiyun compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 87*4882a593Smuzhiyun device_type = "pci"; 88*4882a593Smuzhiyun #size-cells = <2>; 89*4882a593Smuzhiyun #address-cells = <3>; 90*4882a593Smuzhiyun bus-range = <0 0xff>; 91*4882a593Smuzhiyun interrupts = <21 2 0 0>; 92*4882a593Smuzhiyun fsl,iommu-parent = <&pamu0>; 93*4882a593Smuzhiyun pcie@0 { 94*4882a593Smuzhiyun reg = <0 0 0 0 0>; 95*4882a593Smuzhiyun #interrupt-cells = <1>; 96*4882a593Smuzhiyun #size-cells = <2>; 97*4882a593Smuzhiyun #address-cells = <3>; 98*4882a593Smuzhiyun device_type = "pci"; 99*4882a593Smuzhiyun interrupts = <21 2 0 0>; 100*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 7>; 101*4882a593Smuzhiyun interrupt-map = < 102*4882a593Smuzhiyun /* IDSEL 0x0 */ 103*4882a593Smuzhiyun 0000 0 0 1 &mpic 41 1 0 0 104*4882a593Smuzhiyun 0000 0 0 2 &mpic 5 1 0 0 105*4882a593Smuzhiyun 0000 0 0 3 &mpic 6 1 0 0 106*4882a593Smuzhiyun 0000 0 0 4 &mpic 7 1 0 0 107*4882a593Smuzhiyun >; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun}; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun&pci2 { 112*4882a593Smuzhiyun compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; 113*4882a593Smuzhiyun device_type = "pci"; 114*4882a593Smuzhiyun #size-cells = <2>; 115*4882a593Smuzhiyun #address-cells = <3>; 116*4882a593Smuzhiyun bus-range = <0x0 0xff>; 117*4882a593Smuzhiyun interrupts = <22 2 0 0>; 118*4882a593Smuzhiyun fsl,iommu-parent = <&pamu0>; 119*4882a593Smuzhiyun pcie@0 { 120*4882a593Smuzhiyun reg = <0 0 0 0 0>; 121*4882a593Smuzhiyun #interrupt-cells = <1>; 122*4882a593Smuzhiyun #size-cells = <2>; 123*4882a593Smuzhiyun #address-cells = <3>; 124*4882a593Smuzhiyun device_type = "pci"; 125*4882a593Smuzhiyun interrupts = <22 2 0 0>; 126*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 7>; 127*4882a593Smuzhiyun interrupt-map = < 128*4882a593Smuzhiyun /* IDSEL 0x0 */ 129*4882a593Smuzhiyun 0000 0 0 1 &mpic 42 1 0 0 130*4882a593Smuzhiyun 0000 0 0 2 &mpic 9 1 0 0 131*4882a593Smuzhiyun 0000 0 0 3 &mpic 10 1 0 0 132*4882a593Smuzhiyun 0000 0 0 4 &mpic 11 1 0 0 133*4882a593Smuzhiyun >; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun}; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun&dcsr { 138*4882a593Smuzhiyun #address-cells = <1>; 139*4882a593Smuzhiyun #size-cells = <1>; 140*4882a593Smuzhiyun compatible = "fsl,dcsr", "simple-bus"; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun dcsr-epu@0 { 143*4882a593Smuzhiyun compatible = "fsl,t1023-dcsr-epu", "fsl,dcsr-epu"; 144*4882a593Smuzhiyun interrupts = <52 2 0 0 145*4882a593Smuzhiyun 84 2 0 0 146*4882a593Smuzhiyun 85 2 0 0>; 147*4882a593Smuzhiyun reg = <0x0 0x1000>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun dcsr-npc { 150*4882a593Smuzhiyun compatible = "fsl,t1023-dcsr-cnpc", "fsl,dcsr-cnpc"; 151*4882a593Smuzhiyun reg = <0x1000 0x1000 0x1002000 0x10000>; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun dcsr-nxc@2000 { 154*4882a593Smuzhiyun compatible = "fsl,dcsr-nxc"; 155*4882a593Smuzhiyun reg = <0x2000 0x1000>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun dcsr-corenet { 158*4882a593Smuzhiyun compatible = "fsl,dcsr-corenet"; 159*4882a593Smuzhiyun reg = <0x8000 0x1000 0x1A000 0x1000>; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun dcsr-ocn@11000 { 162*4882a593Smuzhiyun compatible = "fsl,t1023-dcsr-ocn", "fsl,dcsr-ocn"; 163*4882a593Smuzhiyun reg = <0x11000 0x1000>; 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun dcsr-ddr@12000 { 166*4882a593Smuzhiyun compatible = "fsl,dcsr-ddr"; 167*4882a593Smuzhiyun dev-handle = <&ddr1>; 168*4882a593Smuzhiyun reg = <0x12000 0x1000>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun dcsr-nal@18000 { 171*4882a593Smuzhiyun compatible = "fsl,t1023-dcsr-nal", "fsl,dcsr-nal"; 172*4882a593Smuzhiyun reg = <0x18000 0x1000>; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun dcsr-rcpm@22000 { 175*4882a593Smuzhiyun compatible = "fsl,t1023-dcsr-rcpm", "fsl,dcsr-rcpm"; 176*4882a593Smuzhiyun reg = <0x22000 0x1000>; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun dcsr-snpc@30000 { 179*4882a593Smuzhiyun compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc"; 180*4882a593Smuzhiyun reg = <0x30000 0x1000 0x1022000 0x10000>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun dcsr-snpc@31000 { 183*4882a593Smuzhiyun compatible = "fsl,t1023-dcsr-snpc", "fsl,dcsr-snpc"; 184*4882a593Smuzhiyun reg = <0x31000 0x1000 0x1042000 0x10000>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun dcsr-cpu-sb-proxy@100000 { 187*4882a593Smuzhiyun compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 188*4882a593Smuzhiyun cpu-handle = <&cpu0>; 189*4882a593Smuzhiyun reg = <0x100000 0x1000 0x101000 0x1000>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun dcsr-cpu-sb-proxy@108000 { 192*4882a593Smuzhiyun compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; 193*4882a593Smuzhiyun cpu-handle = <&cpu1>; 194*4882a593Smuzhiyun reg = <0x108000 0x1000 0x109000 0x1000>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun}; 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun&bportals { 199*4882a593Smuzhiyun #address-cells = <0x1>; 200*4882a593Smuzhiyun #size-cells = <0x1>; 201*4882a593Smuzhiyun compatible = "simple-bus"; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun bman-portal@0 { 204*4882a593Smuzhiyun cell-index = <0x0>; 205*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 206*4882a593Smuzhiyun reg = <0x0 0x4000>, <0x1000000 0x1000>; 207*4882a593Smuzhiyun interrupts = <105 2 0 0>; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun bman-portal@4000 { 210*4882a593Smuzhiyun cell-index = <0x1>; 211*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 212*4882a593Smuzhiyun reg = <0x4000 0x4000>, <0x1001000 0x1000>; 213*4882a593Smuzhiyun interrupts = <107 2 0 0>; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun bman-portal@8000 { 216*4882a593Smuzhiyun cell-index = <2>; 217*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 218*4882a593Smuzhiyun reg = <0x8000 0x4000>, <0x1002000 0x1000>; 219*4882a593Smuzhiyun interrupts = <109 2 0 0>; 220*4882a593Smuzhiyun }; 221*4882a593Smuzhiyun bman-portal@c000 { 222*4882a593Smuzhiyun cell-index = <0x3>; 223*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 224*4882a593Smuzhiyun reg = <0xc000 0x4000>, <0x1003000 0x1000>; 225*4882a593Smuzhiyun interrupts = <111 2 0 0>; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun bman-portal@10000 { 228*4882a593Smuzhiyun cell-index = <0x4>; 229*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 230*4882a593Smuzhiyun reg = <0x10000 0x4000>, <0x1004000 0x1000>; 231*4882a593Smuzhiyun interrupts = <113 2 0 0>; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun bman-portal@14000 { 234*4882a593Smuzhiyun cell-index = <0x5>; 235*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 236*4882a593Smuzhiyun reg = <0x14000 0x4000>, <0x1005000 0x1000>; 237*4882a593Smuzhiyun interrupts = <115 2 0 0>; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun}; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun&qportals { 242*4882a593Smuzhiyun #address-cells = <0x1>; 243*4882a593Smuzhiyun #size-cells = <0x1>; 244*4882a593Smuzhiyun compatible = "simple-bus"; 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun qportal0: qman-portal@0 { 247*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 248*4882a593Smuzhiyun reg = <0x0 0x4000>, <0x1000000 0x1000>; 249*4882a593Smuzhiyun interrupts = <104 0x2 0 0>; 250*4882a593Smuzhiyun cell-index = <0x0>; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun qportal1: qman-portal@4000 { 253*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 254*4882a593Smuzhiyun reg = <0x4000 0x4000>, <0x1001000 0x1000>; 255*4882a593Smuzhiyun interrupts = <106 0x2 0 0>; 256*4882a593Smuzhiyun cell-index = <0x1>; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun qportal2: qman-portal@8000 { 259*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 260*4882a593Smuzhiyun reg = <0x8000 0x4000>, <0x1002000 0x1000>; 261*4882a593Smuzhiyun interrupts = <108 0x2 0 0>; 262*4882a593Smuzhiyun cell-index = <0x2>; 263*4882a593Smuzhiyun }; 264*4882a593Smuzhiyun qportal3: qman-portal@c000 { 265*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 266*4882a593Smuzhiyun reg = <0xc000 0x4000>, <0x1003000 0x1000>; 267*4882a593Smuzhiyun interrupts = <110 0x2 0 0>; 268*4882a593Smuzhiyun cell-index = <0x3>; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun qportal4: qman-portal@10000 { 271*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 272*4882a593Smuzhiyun reg = <0x10000 0x4000>, <0x1004000 0x1000>; 273*4882a593Smuzhiyun interrupts = <112 0x2 0 0>; 274*4882a593Smuzhiyun cell-index = <0x4>; 275*4882a593Smuzhiyun }; 276*4882a593Smuzhiyun qportal5: qman-portal@14000 { 277*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 278*4882a593Smuzhiyun reg = <0x14000 0x4000>, <0x1005000 0x1000>; 279*4882a593Smuzhiyun interrupts = <114 0x2 0 0>; 280*4882a593Smuzhiyun cell-index = <0x5>; 281*4882a593Smuzhiyun }; 282*4882a593Smuzhiyun}; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun&soc { 285*4882a593Smuzhiyun #address-cells = <1>; 286*4882a593Smuzhiyun #size-cells = <1>; 287*4882a593Smuzhiyun device_type = "soc"; 288*4882a593Smuzhiyun compatible = "simple-bus"; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun soc-sram-error { 291*4882a593Smuzhiyun compatible = "fsl,soc-sram-error"; 292*4882a593Smuzhiyun interrupts = <16 2 1 29>; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun corenet-law@0 { 296*4882a593Smuzhiyun compatible = "fsl,corenet-law"; 297*4882a593Smuzhiyun reg = <0x0 0x1000>; 298*4882a593Smuzhiyun fsl,num-laws = <16>; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun ddr1: memory-controller@8000 { 302*4882a593Smuzhiyun compatible = "fsl,qoriq-memory-controller-v5.0", 303*4882a593Smuzhiyun "fsl,qoriq-memory-controller"; 304*4882a593Smuzhiyun reg = <0x8000 0x1000>; 305*4882a593Smuzhiyun interrupts = <16 2 1 23>; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun cpc: l3-cache-controller@10000 { 309*4882a593Smuzhiyun compatible = "fsl,t1023-l3-cache-controller", "cache"; 310*4882a593Smuzhiyun reg = <0x10000 0x1000>; 311*4882a593Smuzhiyun interrupts = <16 2 1 27>; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun corenet-cf@18000 { 315*4882a593Smuzhiyun compatible = "fsl,corenet2-cf"; 316*4882a593Smuzhiyun reg = <0x18000 0x1000>; 317*4882a593Smuzhiyun interrupts = <16 2 1 31>; 318*4882a593Smuzhiyun }; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun iommu@20000 { 321*4882a593Smuzhiyun compatible = "fsl,pamu-v1.0", "fsl,pamu"; 322*4882a593Smuzhiyun reg = <0x20000 0x1000>; 323*4882a593Smuzhiyun ranges = <0 0x20000 0x1000>; 324*4882a593Smuzhiyun #address-cells = <1>; 325*4882a593Smuzhiyun #size-cells = <1>; 326*4882a593Smuzhiyun interrupts = < 327*4882a593Smuzhiyun 24 2 0 0 328*4882a593Smuzhiyun 16 2 1 30>; 329*4882a593Smuzhiyun pamu0: pamu@0 { 330*4882a593Smuzhiyun reg = <0 0x1000>; 331*4882a593Smuzhiyun fsl,primary-cache-geometry = <128 1>; 332*4882a593Smuzhiyun fsl,secondary-cache-geometry = <32 2>; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun/include/ "qoriq-mpic.dtsi" 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun guts: global-utilities@e0000 { 339*4882a593Smuzhiyun compatible = "fsl,t1023-device-config", "fsl,qoriq-device-config-2.0"; 340*4882a593Smuzhiyun reg = <0xe0000 0xe00>; 341*4882a593Smuzhiyun fsl,has-rstcr; 342*4882a593Smuzhiyun fsl,liodn-bits = <12>; 343*4882a593Smuzhiyun }; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun/include/ "qoriq-clockgen2.dtsi" 346*4882a593Smuzhiyun global-utilities@e1000 { 347*4882a593Smuzhiyun compatible = "fsl,t1023-clockgen", "fsl,qoriq-clockgen-2.0"; 348*4882a593Smuzhiyun }; 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun rcpm: global-utilities@e2000 { 351*4882a593Smuzhiyun compatible = "fsl,t1023-rcpm", "fsl,qoriq-rcpm-2.1"; 352*4882a593Smuzhiyun reg = <0xe2000 0x1000>; 353*4882a593Smuzhiyun }; 354*4882a593Smuzhiyun 355*4882a593Smuzhiyun sfp: sfp@e8000 { 356*4882a593Smuzhiyun compatible = "fsl,t1023-sfp"; 357*4882a593Smuzhiyun reg = <0xe8000 0x1000>; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun serdes: serdes@ea000 { 361*4882a593Smuzhiyun compatible = "fsl,t1023-serdes"; 362*4882a593Smuzhiyun reg = <0xea000 0x4000>; 363*4882a593Smuzhiyun }; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun tmu: tmu@f0000 { 366*4882a593Smuzhiyun compatible = "fsl,qoriq-tmu"; 367*4882a593Smuzhiyun reg = <0xf0000 0x1000>; 368*4882a593Smuzhiyun interrupts = <18 2 0 0>; 369*4882a593Smuzhiyun fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>; 370*4882a593Smuzhiyun fsl,tmu-calibration = <0x00000000 0x0000000f 371*4882a593Smuzhiyun 0x00000001 0x00000017 372*4882a593Smuzhiyun 0x00000002 0x0000001e 373*4882a593Smuzhiyun 0x00000003 0x00000026 374*4882a593Smuzhiyun 0x00000004 0x0000002e 375*4882a593Smuzhiyun 0x00000005 0x00000035 376*4882a593Smuzhiyun 0x00000006 0x0000003d 377*4882a593Smuzhiyun 0x00000007 0x00000044 378*4882a593Smuzhiyun 0x00000008 0x0000004c 379*4882a593Smuzhiyun 0x00000009 0x00000053 380*4882a593Smuzhiyun 0x0000000a 0x0000005b 381*4882a593Smuzhiyun 0x0000000b 0x00000064 382*4882a593Smuzhiyun 383*4882a593Smuzhiyun 0x00010000 0x00000011 384*4882a593Smuzhiyun 0x00010001 0x0000001c 385*4882a593Smuzhiyun 0x00010002 0x00000024 386*4882a593Smuzhiyun 0x00010003 0x0000002b 387*4882a593Smuzhiyun 0x00010004 0x00000034 388*4882a593Smuzhiyun 0x00010005 0x00000039 389*4882a593Smuzhiyun 0x00010006 0x00000042 390*4882a593Smuzhiyun 0x00010007 0x0000004c 391*4882a593Smuzhiyun 0x00010008 0x00000051 392*4882a593Smuzhiyun 0x00010009 0x0000005a 393*4882a593Smuzhiyun 0x0001000a 0x00000063 394*4882a593Smuzhiyun 395*4882a593Smuzhiyun 0x00020000 0x00000013 396*4882a593Smuzhiyun 0x00020001 0x00000019 397*4882a593Smuzhiyun 0x00020002 0x00000024 398*4882a593Smuzhiyun 0x00020003 0x0000002c 399*4882a593Smuzhiyun 0x00020004 0x00000035 400*4882a593Smuzhiyun 0x00020005 0x0000003d 401*4882a593Smuzhiyun 0x00020006 0x00000046 402*4882a593Smuzhiyun 0x00020007 0x00000050 403*4882a593Smuzhiyun 0x00020008 0x00000059 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun 0x00030000 0x00000002 406*4882a593Smuzhiyun 0x00030001 0x0000000d 407*4882a593Smuzhiyun 0x00030002 0x00000019 408*4882a593Smuzhiyun 0x00030003 0x00000024>; 409*4882a593Smuzhiyun #thermal-sensor-cells = <1>; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun thermal-zones { 413*4882a593Smuzhiyun cpu_thermal: cpu-thermal { 414*4882a593Smuzhiyun polling-delay-passive = <1000>; 415*4882a593Smuzhiyun polling-delay = <5000>; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun thermal-sensors = <&tmu 0>; 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun trips { 420*4882a593Smuzhiyun cpu_alert: cpu-alert { 421*4882a593Smuzhiyun temperature = <85000>; 422*4882a593Smuzhiyun hysteresis = <2000>; 423*4882a593Smuzhiyun type = "passive"; 424*4882a593Smuzhiyun }; 425*4882a593Smuzhiyun cpu_crit: cpu-crit { 426*4882a593Smuzhiyun temperature = <95000>; 427*4882a593Smuzhiyun hysteresis = <2000>; 428*4882a593Smuzhiyun type = "critical"; 429*4882a593Smuzhiyun }; 430*4882a593Smuzhiyun }; 431*4882a593Smuzhiyun 432*4882a593Smuzhiyun cooling-maps { 433*4882a593Smuzhiyun map0 { 434*4882a593Smuzhiyun trip = <&cpu_alert>; 435*4882a593Smuzhiyun cooling-device = 436*4882a593Smuzhiyun <&cpu0 THERMAL_NO_LIMIT 437*4882a593Smuzhiyun THERMAL_NO_LIMIT>; 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun map1 { 440*4882a593Smuzhiyun trip = <&cpu_alert>; 441*4882a593Smuzhiyun cooling-device = 442*4882a593Smuzhiyun <&cpu1 THERMAL_NO_LIMIT 443*4882a593Smuzhiyun THERMAL_NO_LIMIT>; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun }; 448*4882a593Smuzhiyun 449*4882a593Smuzhiyun scfg: global-utilities@fc000 { 450*4882a593Smuzhiyun compatible = "fsl,t1023-scfg"; 451*4882a593Smuzhiyun reg = <0xfc000 0x1000>; 452*4882a593Smuzhiyun }; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun/include/ "elo3-dma-0.dtsi" 455*4882a593Smuzhiyun/include/ "elo3-dma-1.dtsi" 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun/include/ "qoriq-espi-0.dtsi" 458*4882a593Smuzhiyun spi@110000 { 459*4882a593Smuzhiyun fsl,espi-num-chipselects = <4>; 460*4882a593Smuzhiyun }; 461*4882a593Smuzhiyun 462*4882a593Smuzhiyun/include/ "qoriq-esdhc-0.dtsi" 463*4882a593Smuzhiyun sdhc@114000 { 464*4882a593Smuzhiyun compatible = "fsl,t1023-esdhc", "fsl,esdhc"; 465*4882a593Smuzhiyun fsl,iommu-parent = <&pamu0>; 466*4882a593Smuzhiyun fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */ 467*4882a593Smuzhiyun sdhci,auto-cmd12; 468*4882a593Smuzhiyun no-1-8-v; 469*4882a593Smuzhiyun }; 470*4882a593Smuzhiyun/include/ "qoriq-i2c-0.dtsi" 471*4882a593Smuzhiyun/include/ "qoriq-i2c-1.dtsi" 472*4882a593Smuzhiyun/include/ "qoriq-duart-0.dtsi" 473*4882a593Smuzhiyun/include/ "qoriq-duart-1.dtsi" 474*4882a593Smuzhiyun/include/ "qoriq-gpio-0.dtsi" 475*4882a593Smuzhiyun/include/ "qoriq-gpio-1.dtsi" 476*4882a593Smuzhiyun/include/ "qoriq-gpio-2.dtsi" 477*4882a593Smuzhiyun/include/ "qoriq-gpio-3.dtsi" 478*4882a593Smuzhiyun/include/ "qoriq-usb2-mph-0.dtsi" 479*4882a593Smuzhiyun usb0: usb@210000 { 480*4882a593Smuzhiyun compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph"; 481*4882a593Smuzhiyun fsl,iommu-parent = <&pamu0>; 482*4882a593Smuzhiyun fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */ 483*4882a593Smuzhiyun phy_type = "utmi"; 484*4882a593Smuzhiyun port0; 485*4882a593Smuzhiyun }; 486*4882a593Smuzhiyun/include/ "qoriq-usb2-dr-0.dtsi" 487*4882a593Smuzhiyun usb1: usb@211000 { 488*4882a593Smuzhiyun compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; 489*4882a593Smuzhiyun fsl,iommu-parent = <&pamu0>; 490*4882a593Smuzhiyun fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */ 491*4882a593Smuzhiyun dr_mode = "host"; 492*4882a593Smuzhiyun phy_type = "utmi"; 493*4882a593Smuzhiyun }; 494*4882a593Smuzhiyun/include/ "qoriq-sata2-0.dtsi" 495*4882a593Smuzhiyun sata@220000 { 496*4882a593Smuzhiyun fsl,iommu-parent = <&pamu0>; 497*4882a593Smuzhiyun fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */ 498*4882a593Smuzhiyun }; 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun/include/ "qoriq-sec5.0-0.dtsi" 501*4882a593Smuzhiyun/include/ "qoriq-qman3.dtsi" 502*4882a593Smuzhiyun/include/ "qoriq-bman1.dtsi" 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun/include/ "qoriq-fman3l-0.dtsi" 505*4882a593Smuzhiyun/include/ "qoriq-fman3-0-10g-0-best-effort.dtsi" 506*4882a593Smuzhiyun/include/ "qoriq-fman3-0-1g-1.dtsi" 507*4882a593Smuzhiyun/include/ "qoriq-fman3-0-1g-2.dtsi" 508*4882a593Smuzhiyun/include/ "qoriq-fman3-0-1g-3.dtsi" 509*4882a593Smuzhiyun fman@400000 { 510*4882a593Smuzhiyun enet0: ethernet@e0000 { 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun enet1: ethernet@e2000 { 514*4882a593Smuzhiyun }; 515*4882a593Smuzhiyun 516*4882a593Smuzhiyun enet2: ethernet@e4000 { 517*4882a593Smuzhiyun }; 518*4882a593Smuzhiyun 519*4882a593Smuzhiyun enet3: ethernet@e6000 { 520*4882a593Smuzhiyun }; 521*4882a593Smuzhiyun }; 522*4882a593Smuzhiyun}; 523