xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/ppa8548.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * PPA8548 Device Tree Source (36-bit address map)
4*4882a593Smuzhiyun * Copyright 2013 Prodrive B.V.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Based on:
7*4882a593Smuzhiyun * MPC8548 CDS Device Tree Source (36-bit address map)
8*4882a593Smuzhiyun * Copyright 2012 Freescale Semiconductor Inc.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/include/ "mpc8548si-pre.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "ppa8548";
15*4882a593Smuzhiyun	compatible = "ppa8548";
16*4882a593Smuzhiyun	#address-cells = <2>;
17*4882a593Smuzhiyun	#size-cells = <2>;
18*4882a593Smuzhiyun	interrupt-parent = <&mpic>;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory {
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0 0 0x0 0x40000000>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	lbc: localbus@fe0005000 {
26*4882a593Smuzhiyun		reg = <0xf 0xe0005000 0 0x1000>;
27*4882a593Smuzhiyun		ranges = <0x0 0x0 0xf 0xff800000 0x00800000>;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	soc: soc8548@fe0000000 {
31*4882a593Smuzhiyun		ranges = <0 0xf 0xe0000000 0x100000>;
32*4882a593Smuzhiyun	};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun	pci0: pci@fe0008000 {
35*4882a593Smuzhiyun		/* ppa8548 board doesn't support PCI */
36*4882a593Smuzhiyun		status = "disabled";
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun	pci1: pci@fe0009000 {
40*4882a593Smuzhiyun		/* ppa8548 board doesn't support PCI */
41*4882a593Smuzhiyun		status = "disabled";
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun	pci2: pcie@fe000a000 {
45*4882a593Smuzhiyun		/* ppa8548 board doesn't support PCI */
46*4882a593Smuzhiyun		status = "disabled";
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	rio: rapidio@fe00c0000 {
50*4882a593Smuzhiyun		reg = <0xf 0xe00c0000 0x0 0x11000>;
51*4882a593Smuzhiyun		port1 {
52*4882a593Smuzhiyun			ranges = <0x0 0x0 0x0 0x80000000 0x0 0x40000000>;
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun	};
55*4882a593Smuzhiyun};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun&lbc {
58*4882a593Smuzhiyun	nor@0 {
59*4882a593Smuzhiyun		#address-cells = <1>;
60*4882a593Smuzhiyun		#size-cells = <1>;
61*4882a593Smuzhiyun		compatible = "cfi-flash";
62*4882a593Smuzhiyun		reg = <0x0 0x0 0x00800000>;
63*4882a593Smuzhiyun		bank-width = <2>;
64*4882a593Smuzhiyun		device-width = <2>;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		partition@0 {
67*4882a593Smuzhiyun			reg = <0x0 0x7A0000>;
68*4882a593Smuzhiyun			label = "user";
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		partition@7A0000 {
72*4882a593Smuzhiyun			reg = <0x7A0000 0x20000>;
73*4882a593Smuzhiyun			label = "env";
74*4882a593Smuzhiyun			read-only;
75*4882a593Smuzhiyun		};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun		partition@7C0000 {
78*4882a593Smuzhiyun			reg = <0x7C0000 0x40000>;
79*4882a593Smuzhiyun			label = "u-boot";
80*4882a593Smuzhiyun			read-only;
81*4882a593Smuzhiyun		};
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun&soc {
86*4882a593Smuzhiyun	i2c@3000 {
87*4882a593Smuzhiyun		rtc@6f {
88*4882a593Smuzhiyun			compatible = "intersil,isl1208";
89*4882a593Smuzhiyun			reg = <0x6f>;
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	i2c@3100 {
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	/*
97*4882a593Smuzhiyun	 * Only ethernet controller @25000 and @26000 are used.
98*4882a593Smuzhiyun	 * Use alias enet2 and enet3 for the remainig controllers,
99*4882a593Smuzhiyun	 * to stay compatible with mpc8548si-pre.dtsi.
100*4882a593Smuzhiyun	 */
101*4882a593Smuzhiyun	enet2: ethernet@24000 {
102*4882a593Smuzhiyun		status = "disabled";
103*4882a593Smuzhiyun	};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun	mdio@24520 {
106*4882a593Smuzhiyun		phy0: ethernet-phy@0 {
107*4882a593Smuzhiyun			interrupts = <7 1 0 0>;
108*4882a593Smuzhiyun			reg = <0x0>;
109*4882a593Smuzhiyun		};
110*4882a593Smuzhiyun		phy1: ethernet-phy@1 {
111*4882a593Smuzhiyun			interrupts = <8 1 0 0>;
112*4882a593Smuzhiyun			reg = <0x1>;
113*4882a593Smuzhiyun		};
114*4882a593Smuzhiyun		tbi0: tbi-phy@11 {
115*4882a593Smuzhiyun			reg = <0x11>;
116*4882a593Smuzhiyun			device_type = "tbi-phy";
117*4882a593Smuzhiyun		};
118*4882a593Smuzhiyun	};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun	enet0: ethernet@25000 {
121*4882a593Smuzhiyun		tbi-handle = <&tbi1>;
122*4882a593Smuzhiyun		phy-handle = <&phy0>;
123*4882a593Smuzhiyun	};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun	mdio@25520 {
126*4882a593Smuzhiyun		tbi1: tbi-phy@11 {
127*4882a593Smuzhiyun			reg = <0x11>;
128*4882a593Smuzhiyun			device_type = "tbi-phy";
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	enet1: ethernet@26000 {
133*4882a593Smuzhiyun		tbi-handle = <&tbi2>;
134*4882a593Smuzhiyun		phy-handle = <&phy1>;
135*4882a593Smuzhiyun	};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun	mdio@26520 {
138*4882a593Smuzhiyun		tbi2: tbi-phy@11 {
139*4882a593Smuzhiyun			reg = <0x11>;
140*4882a593Smuzhiyun			device_type = "tbi-phy";
141*4882a593Smuzhiyun		};
142*4882a593Smuzhiyun	};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun	enet3: ethernet@27000 {
145*4882a593Smuzhiyun		status = "disabled";
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun	mdio@27520 {
149*4882a593Smuzhiyun		tbi3: tbi-phy@11 {
150*4882a593Smuzhiyun			reg = <0x11>;
151*4882a593Smuzhiyun			device_type = "tbi-phy";
152*4882a593Smuzhiyun		};
153*4882a593Smuzhiyun	};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun	crypto@30000 {
156*4882a593Smuzhiyun		status = "disabled";
157*4882a593Smuzhiyun	};
158*4882a593Smuzhiyun};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun/include/ "mpc8548si-post.dtsi"
161