1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * P2020 RDB Device Tree Source 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2009-2012 Freescale Semiconductor Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/include/ "p2020si-pre.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "fsl,P2020RDB"; 12*4882a593Smuzhiyun compatible = "fsl,P2020RDB"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun aliases { 15*4882a593Smuzhiyun ethernet0 = &enet0; 16*4882a593Smuzhiyun ethernet1 = &enet1; 17*4882a593Smuzhiyun ethernet2 = &enet2; 18*4882a593Smuzhiyun serial0 = &serial0; 19*4882a593Smuzhiyun serial1 = &serial1; 20*4882a593Smuzhiyun pci0 = &pci0; 21*4882a593Smuzhiyun pci1 = &pci1; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun memory { 25*4882a593Smuzhiyun device_type = "memory"; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun lbc: localbus@ffe05000 { 29*4882a593Smuzhiyun reg = <0 0xffe05000 0 0x1000>; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* NOR and NAND Flashes */ 32*4882a593Smuzhiyun ranges = <0x0 0x0 0x0 0xef000000 0x01000000 33*4882a593Smuzhiyun 0x1 0x0 0x0 0xffa00000 0x00040000 34*4882a593Smuzhiyun 0x2 0x0 0x0 0xffb00000 0x00020000>; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun nor@0,0 { 37*4882a593Smuzhiyun #address-cells = <1>; 38*4882a593Smuzhiyun #size-cells = <1>; 39*4882a593Smuzhiyun compatible = "cfi-flash"; 40*4882a593Smuzhiyun reg = <0x0 0x0 0x1000000>; 41*4882a593Smuzhiyun bank-width = <2>; 42*4882a593Smuzhiyun device-width = <1>; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun partition@0 { 45*4882a593Smuzhiyun /* This location must not be altered */ 46*4882a593Smuzhiyun /* 256KB for Vitesse 7385 Switch firmware */ 47*4882a593Smuzhiyun reg = <0x0 0x00040000>; 48*4882a593Smuzhiyun label = "NOR (RO) Vitesse-7385 Firmware"; 49*4882a593Smuzhiyun read-only; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun partition@40000 { 53*4882a593Smuzhiyun /* 256KB for DTB Image */ 54*4882a593Smuzhiyun reg = <0x00040000 0x00040000>; 55*4882a593Smuzhiyun label = "NOR (RO) DTB Image"; 56*4882a593Smuzhiyun read-only; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun partition@80000 { 60*4882a593Smuzhiyun /* 3.5 MB for Linux Kernel Image */ 61*4882a593Smuzhiyun reg = <0x00080000 0x00380000>; 62*4882a593Smuzhiyun label = "NOR (RO) Linux Kernel Image"; 63*4882a593Smuzhiyun read-only; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun partition@400000 { 67*4882a593Smuzhiyun /* 11MB for JFFS2 based Root file System */ 68*4882a593Smuzhiyun reg = <0x00400000 0x00b00000>; 69*4882a593Smuzhiyun label = "NOR (RW) JFFS2 Root File System"; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun partition@f00000 { 73*4882a593Smuzhiyun /* This location must not be altered */ 74*4882a593Smuzhiyun /* 512KB for u-boot Bootloader Image */ 75*4882a593Smuzhiyun /* 512KB for u-boot Environment Variables */ 76*4882a593Smuzhiyun reg = <0x00f00000 0x00100000>; 77*4882a593Smuzhiyun label = "NOR (RO) U-Boot Image"; 78*4882a593Smuzhiyun read-only; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun nand@1,0 { 83*4882a593Smuzhiyun #address-cells = <1>; 84*4882a593Smuzhiyun #size-cells = <1>; 85*4882a593Smuzhiyun compatible = "fsl,p2020-fcm-nand", 86*4882a593Smuzhiyun "fsl,elbc-fcm-nand"; 87*4882a593Smuzhiyun reg = <0x1 0x0 0x40000>; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun partition@0 { 90*4882a593Smuzhiyun /* This location must not be altered */ 91*4882a593Smuzhiyun /* 1MB for u-boot Bootloader Image */ 92*4882a593Smuzhiyun reg = <0x0 0x00100000>; 93*4882a593Smuzhiyun label = "NAND (RO) U-Boot Image"; 94*4882a593Smuzhiyun read-only; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun partition@100000 { 98*4882a593Smuzhiyun /* 1MB for DTB Image */ 99*4882a593Smuzhiyun reg = <0x00100000 0x00100000>; 100*4882a593Smuzhiyun label = "NAND (RO) DTB Image"; 101*4882a593Smuzhiyun read-only; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun partition@200000 { 105*4882a593Smuzhiyun /* 4MB for Linux Kernel Image */ 106*4882a593Smuzhiyun reg = <0x00200000 0x00400000>; 107*4882a593Smuzhiyun label = "NAND (RO) Linux Kernel Image"; 108*4882a593Smuzhiyun read-only; 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun partition@600000 { 112*4882a593Smuzhiyun /* 4MB for Compressed Root file System Image */ 113*4882a593Smuzhiyun reg = <0x00600000 0x00400000>; 114*4882a593Smuzhiyun label = "NAND (RO) Compressed RFS Image"; 115*4882a593Smuzhiyun read-only; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun partition@a00000 { 119*4882a593Smuzhiyun /* 7MB for JFFS2 based Root file System */ 120*4882a593Smuzhiyun reg = <0x00a00000 0x00700000>; 121*4882a593Smuzhiyun label = "NAND (RW) JFFS2 Root File System"; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun partition@1100000 { 125*4882a593Smuzhiyun /* 15MB for JFFS2 based Root file System */ 126*4882a593Smuzhiyun reg = <0x01100000 0x00f00000>; 127*4882a593Smuzhiyun label = "NAND (RW) Writable User area"; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun L2switch@2,0 { 132*4882a593Smuzhiyun #address-cells = <1>; 133*4882a593Smuzhiyun #size-cells = <1>; 134*4882a593Smuzhiyun compatible = "vitesse-7385"; 135*4882a593Smuzhiyun reg = <0x2 0x0 0x20000>; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun soc: soc@ffe00000 { 141*4882a593Smuzhiyun ranges = <0x0 0x0 0xffe00000 0x100000>; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun i2c@3000 { 144*4882a593Smuzhiyun rtc@68 { 145*4882a593Smuzhiyun compatible = "dallas,ds1339"; 146*4882a593Smuzhiyun reg = <0x68>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun spi@7000 { 151*4882a593Smuzhiyun flash@0 { 152*4882a593Smuzhiyun #address-cells = <1>; 153*4882a593Smuzhiyun #size-cells = <1>; 154*4882a593Smuzhiyun compatible = "spansion,s25sl12801", "jedec,spi-nor"; 155*4882a593Smuzhiyun reg = <0>; 156*4882a593Smuzhiyun spi-max-frequency = <40000000>; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun partition@0 { 159*4882a593Smuzhiyun /* 512KB for u-boot Bootloader Image */ 160*4882a593Smuzhiyun reg = <0x0 0x00080000>; 161*4882a593Smuzhiyun label = "SPI (RO) U-Boot Image"; 162*4882a593Smuzhiyun read-only; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun partition@80000 { 166*4882a593Smuzhiyun /* 512KB for DTB Image */ 167*4882a593Smuzhiyun reg = <0x00080000 0x00080000>; 168*4882a593Smuzhiyun label = "SPI (RO) DTB Image"; 169*4882a593Smuzhiyun read-only; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun partition@100000 { 173*4882a593Smuzhiyun /* 4MB for Linux Kernel Image */ 174*4882a593Smuzhiyun reg = <0x00100000 0x00400000>; 175*4882a593Smuzhiyun label = "SPI (RO) Linux Kernel Image"; 176*4882a593Smuzhiyun read-only; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun partition@500000 { 180*4882a593Smuzhiyun /* 4MB for Compressed RFS Image */ 181*4882a593Smuzhiyun reg = <0x00500000 0x00400000>; 182*4882a593Smuzhiyun label = "SPI (RO) Compressed RFS Image"; 183*4882a593Smuzhiyun read-only; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun partition@900000 { 187*4882a593Smuzhiyun /* 7MB for JFFS2 based RFS */ 188*4882a593Smuzhiyun reg = <0x00900000 0x00700000>; 189*4882a593Smuzhiyun label = "SPI (RW) JFFS2 RFS"; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun usb@22000 { 195*4882a593Smuzhiyun phy_type = "ulpi"; 196*4882a593Smuzhiyun dr_mode = "host"; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun mdio@24520 { 200*4882a593Smuzhiyun phy0: ethernet-phy@0 { 201*4882a593Smuzhiyun interrupts = <3 1 0 0>; 202*4882a593Smuzhiyun reg = <0x0>; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun phy1: ethernet-phy@1 { 205*4882a593Smuzhiyun interrupts = <3 1 0 0>; 206*4882a593Smuzhiyun reg = <0x1>; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun tbi-phy@2 { 209*4882a593Smuzhiyun device_type = "tbi-phy"; 210*4882a593Smuzhiyun reg = <0x2>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun }; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun mdio@25520 { 215*4882a593Smuzhiyun tbi0: tbi-phy@11 { 216*4882a593Smuzhiyun reg = <0x11>; 217*4882a593Smuzhiyun device_type = "tbi-phy"; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun mdio@26520 { 222*4882a593Smuzhiyun status = "disabled"; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun ptp_clock@24e00 { 226*4882a593Smuzhiyun fsl,tclk-period = <5>; 227*4882a593Smuzhiyun fsl,tmr-prsc = <200>; 228*4882a593Smuzhiyun fsl,tmr-add = <0xCCCCCCCD>; 229*4882a593Smuzhiyun fsl,tmr-fiper1 = <0x3B9AC9FB>; 230*4882a593Smuzhiyun fsl,tmr-fiper2 = <0x0001869B>; 231*4882a593Smuzhiyun fsl,max-adj = <249999999>; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun enet0: ethernet@24000 { 235*4882a593Smuzhiyun fixed-link = <1 1 1000 0 0>; 236*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 237*4882a593Smuzhiyun }; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun enet1: ethernet@25000 { 240*4882a593Smuzhiyun tbi-handle = <&tbi0>; 241*4882a593Smuzhiyun phy-handle = <&phy0>; 242*4882a593Smuzhiyun phy-connection-type = "sgmii"; 243*4882a593Smuzhiyun }; 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun enet2: ethernet@26000 { 246*4882a593Smuzhiyun phy-handle = <&phy1>; 247*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun }; 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun pci0: pcie@ffe08000 { 252*4882a593Smuzhiyun reg = <0 0xffe08000 0 0x1000>; 253*4882a593Smuzhiyun status = "disabled"; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun pci1: pcie@ffe09000 { 257*4882a593Smuzhiyun reg = <0 0xffe09000 0 0x1000>; 258*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 259*4882a593Smuzhiyun 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 260*4882a593Smuzhiyun pcie@0 { 261*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xa0000000 262*4882a593Smuzhiyun 0x2000000 0x0 0xa0000000 263*4882a593Smuzhiyun 0x0 0x20000000 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun 0x1000000 0x0 0x0 266*4882a593Smuzhiyun 0x1000000 0x0 0x0 267*4882a593Smuzhiyun 0x0 0x100000>; 268*4882a593Smuzhiyun }; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun pci2: pcie@ffe0a000 { 272*4882a593Smuzhiyun reg = <0 0xffe0a000 0 0x1000>; 273*4882a593Smuzhiyun ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 274*4882a593Smuzhiyun 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 275*4882a593Smuzhiyun pcie@0 { 276*4882a593Smuzhiyun ranges = <0x2000000 0x0 0x80000000 277*4882a593Smuzhiyun 0x2000000 0x0 0x80000000 278*4882a593Smuzhiyun 0x0 0x20000000 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun 0x1000000 0x0 0x0 281*4882a593Smuzhiyun 0x1000000 0x0 0x0 282*4882a593Smuzhiyun 0x0 0x100000>; 283*4882a593Smuzhiyun }; 284*4882a593Smuzhiyun }; 285*4882a593Smuzhiyun}; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun/include/ "p2020si-post.dtsi" 288