1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * P2020DS Device Tree Source stub (no addresses or top-level ranges) 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2011-2012 Freescale Semiconductor Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met: 8*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 9*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 10*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 11*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in the 12*4882a593Smuzhiyun * documentation and/or other materials provided with the distribution. 13*4882a593Smuzhiyun * * Neither the name of Freescale Semiconductor nor the 14*4882a593Smuzhiyun * names of its contributors may be used to endorse or promote products 15*4882a593Smuzhiyun * derived from this software without specific prior written permission. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the 19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software 20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any 21*4882a593Smuzhiyun * later version. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun&board_lbc { 36*4882a593Smuzhiyun nor@0,0 { 37*4882a593Smuzhiyun #address-cells = <1>; 38*4882a593Smuzhiyun #size-cells = <1>; 39*4882a593Smuzhiyun compatible = "cfi-flash"; 40*4882a593Smuzhiyun reg = <0x0 0x0 0x8000000>; 41*4882a593Smuzhiyun bank-width = <2>; 42*4882a593Smuzhiyun device-width = <1>; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun ramdisk@0 { 45*4882a593Smuzhiyun reg = <0x0 0x03000000>; 46*4882a593Smuzhiyun read-only; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun diagnostic@3000000 { 50*4882a593Smuzhiyun reg = <0x03000000 0x00e00000>; 51*4882a593Smuzhiyun read-only; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun dink@3e00000 { 55*4882a593Smuzhiyun reg = <0x03e00000 0x00200000>; 56*4882a593Smuzhiyun read-only; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun kernel@4000000 { 60*4882a593Smuzhiyun reg = <0x04000000 0x00400000>; 61*4882a593Smuzhiyun read-only; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun jffs2@4400000 { 65*4882a593Smuzhiyun reg = <0x04400000 0x03b00000>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun dtb@7f00000 { 69*4882a593Smuzhiyun reg = <0x07f00000 0x00080000>; 70*4882a593Smuzhiyun read-only; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun u-boot@7f80000 { 74*4882a593Smuzhiyun reg = <0x07f80000 0x00080000>; 75*4882a593Smuzhiyun read-only; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun nand@2,0 { 80*4882a593Smuzhiyun #address-cells = <1>; 81*4882a593Smuzhiyun #size-cells = <1>; 82*4882a593Smuzhiyun compatible = "fsl,elbc-fcm-nand"; 83*4882a593Smuzhiyun reg = <0x2 0x0 0x40000>; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun u-boot@0 { 86*4882a593Smuzhiyun reg = <0x0 0x02000000>; 87*4882a593Smuzhiyun read-only; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun jffs2@2000000 { 91*4882a593Smuzhiyun reg = <0x02000000 0x10000000>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun ramdisk@12000000 { 95*4882a593Smuzhiyun reg = <0x12000000 0x08000000>; 96*4882a593Smuzhiyun read-only; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun kernel@1a000000 { 100*4882a593Smuzhiyun reg = <0x1a000000 0x04000000>; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun dtb@1e000000 { 104*4882a593Smuzhiyun reg = <0x1e000000 0x01000000>; 105*4882a593Smuzhiyun read-only; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun empty@1f000000 { 109*4882a593Smuzhiyun reg = <0x1f000000 0x21000000>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun board-control@3,0 { 114*4882a593Smuzhiyun compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis"; 115*4882a593Smuzhiyun reg = <0x3 0x0 0x30>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun nand@4,0 { 119*4882a593Smuzhiyun compatible = "fsl,elbc-fcm-nand"; 120*4882a593Smuzhiyun reg = <0x4 0x0 0x40000>; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun nand@5,0 { 124*4882a593Smuzhiyun compatible = "fsl,elbc-fcm-nand"; 125*4882a593Smuzhiyun reg = <0x5 0x0 0x40000>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun nand@6,0 { 129*4882a593Smuzhiyun compatible = "fsl,elbc-fcm-nand"; 130*4882a593Smuzhiyun reg = <0x6 0x0 0x40000>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun}; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun&board_soc { 135*4882a593Smuzhiyun usb@22000 { 136*4882a593Smuzhiyun phy_type = "ulpi"; 137*4882a593Smuzhiyun dr_mode = "host"; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun mdio@24520 { 141*4882a593Smuzhiyun phy0: ethernet-phy@0 { 142*4882a593Smuzhiyun interrupts = <3 1 0 0>; 143*4882a593Smuzhiyun reg = <0x0>; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun phy1: ethernet-phy@1 { 146*4882a593Smuzhiyun interrupts = <3 1 0 0>; 147*4882a593Smuzhiyun reg = <0x1>; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun phy2: ethernet-phy@2 { 150*4882a593Smuzhiyun interrupts = <3 1 0 0>; 151*4882a593Smuzhiyun reg = <0x2>; 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun sgmii_phy1: sgmii-phy@1 { 155*4882a593Smuzhiyun interrupts = <5 1 0 0>; 156*4882a593Smuzhiyun reg = <0x1c>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun sgmii_phy2: sgmii-phy@2 { 159*4882a593Smuzhiyun interrupts = <5 1 0 0>; 160*4882a593Smuzhiyun reg = <0x1d>; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun tbi0: tbi-phy@11 { 164*4882a593Smuzhiyun reg = <0x11>; 165*4882a593Smuzhiyun device_type = "tbi-phy"; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun mdio@25520 { 171*4882a593Smuzhiyun tbi1: tbi-phy@11 { 172*4882a593Smuzhiyun reg = <0x11>; 173*4882a593Smuzhiyun device_type = "tbi-phy"; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun mdio@26520 { 178*4882a593Smuzhiyun tbi2: tbi-phy@11 { 179*4882a593Smuzhiyun reg = <0x11>; 180*4882a593Smuzhiyun device_type = "tbi-phy"; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun }; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun ptp_clock@24e00 { 186*4882a593Smuzhiyun fsl,tclk-period = <5>; 187*4882a593Smuzhiyun fsl,tmr-prsc = <200>; 188*4882a593Smuzhiyun fsl,tmr-add = <0xCCCCCCCD>; 189*4882a593Smuzhiyun fsl,tmr-fiper1 = <0x3B9AC9FB>; 190*4882a593Smuzhiyun fsl,tmr-fiper2 = <0x0001869B>; 191*4882a593Smuzhiyun fsl,max-adj = <249999999>; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun enet0: ethernet@24000 { 195*4882a593Smuzhiyun tbi-handle = <&tbi0>; 196*4882a593Smuzhiyun phy-handle = <&phy0>; 197*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun enet1: ethernet@25000 { 201*4882a593Smuzhiyun tbi-handle = <&tbi1>; 202*4882a593Smuzhiyun phy-handle = <&phy1>; 203*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun enet2: ethernet@26000 { 208*4882a593Smuzhiyun tbi-handle = <&tbi2>; 209*4882a593Smuzhiyun phy-handle = <&phy2>; 210*4882a593Smuzhiyun phy-connection-type = "rgmii-id"; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun}; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun&board_pci1 { 215*4882a593Smuzhiyun pcie@0 { 216*4882a593Smuzhiyun interrupt-map-mask = <0xff00 0x0 0x0 0x7>; 217*4882a593Smuzhiyun interrupt-map = < 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun // IDSEL 0x11 func 0 - PCI slot 1 220*4882a593Smuzhiyun 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 221*4882a593Smuzhiyun 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun // IDSEL 0x11 func 1 - PCI slot 1 224*4882a593Smuzhiyun 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 225*4882a593Smuzhiyun 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun // IDSEL 0x11 func 2 - PCI slot 1 228*4882a593Smuzhiyun 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 229*4882a593Smuzhiyun 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun // IDSEL 0x11 func 3 - PCI slot 1 232*4882a593Smuzhiyun 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 233*4882a593Smuzhiyun 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun // IDSEL 0x11 func 4 - PCI slot 1 236*4882a593Smuzhiyun 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 237*4882a593Smuzhiyun 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun // IDSEL 0x11 func 5 - PCI slot 1 240*4882a593Smuzhiyun 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 241*4882a593Smuzhiyun 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun // IDSEL 0x11 func 6 - PCI slot 1 244*4882a593Smuzhiyun 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 245*4882a593Smuzhiyun 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun // IDSEL 0x11 func 7 - PCI slot 1 248*4882a593Smuzhiyun 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2 249*4882a593Smuzhiyun 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun // IDSEL 0x1d Audio 252*4882a593Smuzhiyun 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 253*4882a593Smuzhiyun 254*4882a593Smuzhiyun // IDSEL 0x1e Legacy 255*4882a593Smuzhiyun 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 256*4882a593Smuzhiyun 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun // IDSEL 0x1f IDE/SATA 259*4882a593Smuzhiyun 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 260*4882a593Smuzhiyun 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 261*4882a593Smuzhiyun >; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun uli1575@0 { 264*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x0 0x0>; 265*4882a593Smuzhiyun #size-cells = <2>; 266*4882a593Smuzhiyun #address-cells = <3>; 267*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xa0000000 268*4882a593Smuzhiyun 0x2000000 0x0 0xa0000000 269*4882a593Smuzhiyun 0x0 0x20000000 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun 0x1000000 0x0 0x0 272*4882a593Smuzhiyun 0x1000000 0x0 0x0 273*4882a593Smuzhiyun 0x0 0x10000>; 274*4882a593Smuzhiyun isa@1e { 275*4882a593Smuzhiyun device_type = "isa"; 276*4882a593Smuzhiyun #interrupt-cells = <2>; 277*4882a593Smuzhiyun #size-cells = <1>; 278*4882a593Smuzhiyun #address-cells = <2>; 279*4882a593Smuzhiyun reg = <0xf000 0x0 0x0 0x0 0x0>; 280*4882a593Smuzhiyun ranges = <0x1 0x0 0x1000000 0x0 0x0 281*4882a593Smuzhiyun 0x1000>; 282*4882a593Smuzhiyun interrupt-parent = <&i8259>; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun i8259: interrupt-controller@20 { 285*4882a593Smuzhiyun reg = <0x1 0x20 0x2 286*4882a593Smuzhiyun 0x1 0xa0 0x2 287*4882a593Smuzhiyun 0x1 0x4d0 0x2>; 288*4882a593Smuzhiyun interrupt-controller; 289*4882a593Smuzhiyun device_type = "interrupt-controller"; 290*4882a593Smuzhiyun #address-cells = <0>; 291*4882a593Smuzhiyun #interrupt-cells = <2>; 292*4882a593Smuzhiyun compatible = "chrp,iic"; 293*4882a593Smuzhiyun interrupts = <4 1 0 0>; 294*4882a593Smuzhiyun interrupt-parent = <&mpic>; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun i8042@60 { 298*4882a593Smuzhiyun #size-cells = <0>; 299*4882a593Smuzhiyun #address-cells = <1>; 300*4882a593Smuzhiyun reg = <0x1 0x60 0x1 0x1 0x64 0x1>; 301*4882a593Smuzhiyun interrupts = <1 3 12 3>; 302*4882a593Smuzhiyun interrupt-parent = 303*4882a593Smuzhiyun <&i8259>; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun keyboard@0 { 306*4882a593Smuzhiyun reg = <0x0>; 307*4882a593Smuzhiyun compatible = "pnpPNP,303"; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun mouse@1 { 311*4882a593Smuzhiyun reg = <0x1>; 312*4882a593Smuzhiyun compatible = "pnpPNP,f03"; 313*4882a593Smuzhiyun }; 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun rtc@70 { 317*4882a593Smuzhiyun compatible = "pnpPNP,b00"; 318*4882a593Smuzhiyun reg = <0x1 0x70 0x2>; 319*4882a593Smuzhiyun }; 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun gpio@400 { 322*4882a593Smuzhiyun reg = <0x1 0x400 0x80>; 323*4882a593Smuzhiyun }; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun }; 327*4882a593Smuzhiyun}; 328