1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * P1025 TWR Device Tree Source (32-bit address map) 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2013 Freescale Semiconductor Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met: 8*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 9*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 10*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 11*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in the 12*4882a593Smuzhiyun * documentation and/or other materials provided with the distribution. 13*4882a593Smuzhiyun * * Neither the name of Freescale Semiconductor nor the 14*4882a593Smuzhiyun * names of its contributors may be used to endorse or promote products 15*4882a593Smuzhiyun * derived from this software without specific prior written permission. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the 19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software 20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any 21*4882a593Smuzhiyun * later version. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun/include/ "p1021si-pre.dtsi" 36*4882a593Smuzhiyun/ { 37*4882a593Smuzhiyun model = "fsl,P1025"; 38*4882a593Smuzhiyun compatible = "fsl,TWR-P1025"; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun memory { 41*4882a593Smuzhiyun device_type = "memory"; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun lbc: localbus@ffe05000 { 45*4882a593Smuzhiyun reg = <0 0xffe05000 0 0x1000>; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* NOR Flash and SSD1289 */ 48*4882a593Smuzhiyun ranges = <0x0 0x0 0x0 0xec000000 0x04000000 49*4882a593Smuzhiyun 0x2 0x0 0x0 0xe0000000 0x00020000>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun soc: soc@ffe00000 { 53*4882a593Smuzhiyun ranges = <0x0 0x0 0xffe00000 0x100000>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun pci0: pcie@ffe09000 { 57*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 58*4882a593Smuzhiyun 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 59*4882a593Smuzhiyun reg = <0 0xffe09000 0 0x1000>; 60*4882a593Smuzhiyun pcie@0 { 61*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xa0000000 62*4882a593Smuzhiyun 0x2000000 0x0 0xa0000000 63*4882a593Smuzhiyun 0x0 0x20000000 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun 0x1000000 0x0 0x0 66*4882a593Smuzhiyun 0x1000000 0x0 0x0 67*4882a593Smuzhiyun 0x0 0x100000>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun pci1: pcie@ffe0a000 { 72*4882a593Smuzhiyun reg = <0 0xffe0a000 0 0x1000>; 73*4882a593Smuzhiyun ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 74*4882a593Smuzhiyun 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 75*4882a593Smuzhiyun pcie@0 { 76*4882a593Smuzhiyun ranges = <0x2000000 0x0 0x80000000 77*4882a593Smuzhiyun 0x2000000 0x0 0x80000000 78*4882a593Smuzhiyun 0x0 0x20000000 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun 0x1000000 0x0 0x0 81*4882a593Smuzhiyun 0x1000000 0x0 0x0 82*4882a593Smuzhiyun 0x0 0x100000>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun qe: qe@ffe80000 { 87*4882a593Smuzhiyun ranges = <0x0 0x0 0xffe80000 0x40000>; 88*4882a593Smuzhiyun reg = <0 0xffe80000 0 0x480>; 89*4882a593Smuzhiyun brg-frequency = <0>; 90*4882a593Smuzhiyun bus-frequency = <0>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun}; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun/include/ "p1025twr.dtsi" 95*4882a593Smuzhiyun/include/ "p1021si-post.dtsi" 96