1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * P1023/P1017 Silicon/SoC Device Tree Source (post include) 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2011 - 2014 Freescale Semiconductor Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met: 8*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 9*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 10*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 11*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in the 12*4882a593Smuzhiyun * documentation and/or other materials provided with the distribution. 13*4882a593Smuzhiyun * * Neither the name of Freescale Semiconductor nor the 14*4882a593Smuzhiyun * names of its contributors may be used to endorse or promote products 15*4882a593Smuzhiyun * derived from this software without specific prior written permission. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the 19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software 20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any 21*4882a593Smuzhiyun * later version. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*4882a593Smuzhiyun */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun&bman_fbpr { 36*4882a593Smuzhiyun compatible = "fsl,bman-fbpr"; 37*4882a593Smuzhiyun alloc-ranges = <0 0 0x10 0>; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun&qman_fqd { 41*4882a593Smuzhiyun compatible = "fsl,qman-fqd"; 42*4882a593Smuzhiyun alloc-ranges = <0 0 0x10 0>; 43*4882a593Smuzhiyun}; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun&qman_pfdr { 46*4882a593Smuzhiyun compatible = "fsl,qman-pfdr"; 47*4882a593Smuzhiyun alloc-ranges = <0 0 0x10 0>; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&lbc { 51*4882a593Smuzhiyun #address-cells = <2>; 52*4882a593Smuzhiyun #size-cells = <1>; 53*4882a593Smuzhiyun compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus"; 54*4882a593Smuzhiyun interrupts = <19 2 0 0>, 55*4882a593Smuzhiyun <16 2 0 0>; 56*4882a593Smuzhiyun}; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun/* controller at 0xa000 */ 59*4882a593Smuzhiyun&pci0 { 60*4882a593Smuzhiyun compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 61*4882a593Smuzhiyun device_type = "pci"; 62*4882a593Smuzhiyun #size-cells = <2>; 63*4882a593Smuzhiyun #address-cells = <3>; 64*4882a593Smuzhiyun bus-range = <0x0 0xff>; 65*4882a593Smuzhiyun clock-frequency = <33333333>; 66*4882a593Smuzhiyun interrupts = <16 2 0 0>; 67*4882a593Smuzhiyun pcie@0 { 68*4882a593Smuzhiyun reg = <0 0 0 0 0>; 69*4882a593Smuzhiyun #interrupt-cells = <1>; 70*4882a593Smuzhiyun #size-cells = <2>; 71*4882a593Smuzhiyun #address-cells = <3>; 72*4882a593Smuzhiyun device_type = "pci"; 73*4882a593Smuzhiyun interrupts = <16 2 0 0>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun/* controller at 0x9000 */ 78*4882a593Smuzhiyun&pci1 { 79*4882a593Smuzhiyun compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 80*4882a593Smuzhiyun device_type = "pci"; 81*4882a593Smuzhiyun #size-cells = <2>; 82*4882a593Smuzhiyun #address-cells = <3>; 83*4882a593Smuzhiyun bus-range = <0 0xff>; 84*4882a593Smuzhiyun clock-frequency = <33333333>; 85*4882a593Smuzhiyun interrupts = <16 2 0 0>; 86*4882a593Smuzhiyun pcie@0 { 87*4882a593Smuzhiyun reg = <0 0 0 0 0>; 88*4882a593Smuzhiyun #interrupt-cells = <1>; 89*4882a593Smuzhiyun #size-cells = <2>; 90*4882a593Smuzhiyun #address-cells = <3>; 91*4882a593Smuzhiyun device_type = "pci"; 92*4882a593Smuzhiyun interrupts = <16 2 0 0>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun}; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun/* controller at 0xb000 */ 97*4882a593Smuzhiyun&pci2 { 98*4882a593Smuzhiyun compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; 99*4882a593Smuzhiyun device_type = "pci"; 100*4882a593Smuzhiyun #size-cells = <2>; 101*4882a593Smuzhiyun #address-cells = <3>; 102*4882a593Smuzhiyun bus-range = <0x0 0xff>; 103*4882a593Smuzhiyun clock-frequency = <33333333>; 104*4882a593Smuzhiyun interrupts = <16 2 0 0>; 105*4882a593Smuzhiyun pcie@0 { 106*4882a593Smuzhiyun reg = <0 0 0 0 0>; 107*4882a593Smuzhiyun #interrupt-cells = <1>; 108*4882a593Smuzhiyun #size-cells = <2>; 109*4882a593Smuzhiyun #address-cells = <3>; 110*4882a593Smuzhiyun device_type = "pci"; 111*4882a593Smuzhiyun interrupts = <16 2 0 0>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun}; 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun&qportals { 116*4882a593Smuzhiyun #address-cells = <1>; 117*4882a593Smuzhiyun #size-cells = <1>; 118*4882a593Smuzhiyun compatible = "simple-bus"; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun qportal0: qman-portal@0 { 121*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 122*4882a593Smuzhiyun reg = <0x0 0x4000>, <0x100000 0x1000>; 123*4882a593Smuzhiyun interrupts = <29 2 0 0>; 124*4882a593Smuzhiyun cell-index = <0>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun qportal1: qman-portal@4000 { 127*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 128*4882a593Smuzhiyun reg = <0x4000 0x4000>, <0x101000 0x1000>; 129*4882a593Smuzhiyun interrupts = <31 2 0 0>; 130*4882a593Smuzhiyun cell-index = <1>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun qportal2: qman-portal@8000 { 133*4882a593Smuzhiyun compatible = "fsl,qman-portal"; 134*4882a593Smuzhiyun reg = <0x8000 0x4000>, <0x102000 0x1000>; 135*4882a593Smuzhiyun interrupts = <33 2 0 0>; 136*4882a593Smuzhiyun cell-index = <2>; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun}; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun&bportals { 141*4882a593Smuzhiyun #address-cells = <1>; 142*4882a593Smuzhiyun #size-cells = <1>; 143*4882a593Smuzhiyun compatible = "simple-bus"; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun bman-portal@0 { 146*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 147*4882a593Smuzhiyun reg = <0x0 0x4000>, <0x100000 0x1000>; 148*4882a593Smuzhiyun interrupts = <30 2 0 0>; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun bman-portal@4000 { 151*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 152*4882a593Smuzhiyun reg = <0x4000 0x4000>, <0x101000 0x1000>; 153*4882a593Smuzhiyun interrupts = <32 2 0 0>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun bman-portal@8000 { 156*4882a593Smuzhiyun compatible = "fsl,bman-portal"; 157*4882a593Smuzhiyun reg = <0x8000 0x4000>, <0x102000 0x1000>; 158*4882a593Smuzhiyun interrupts = <34 2 0 0>; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun}; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun&soc { 163*4882a593Smuzhiyun #address-cells = <1>; 164*4882a593Smuzhiyun #size-cells = <1>; 165*4882a593Smuzhiyun device_type = "soc"; 166*4882a593Smuzhiyun compatible = "fsl,p1023-immr", "simple-bus"; 167*4882a593Smuzhiyun bus-frequency = <0>; // Filled out by uboot. 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun ecm-law@0 { 170*4882a593Smuzhiyun compatible = "fsl,ecm-law"; 171*4882a593Smuzhiyun reg = <0x0 0x1000>; 172*4882a593Smuzhiyun fsl,num-laws = <12>; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun ecm@1000 { 176*4882a593Smuzhiyun compatible = "fsl,p1023-ecm", "fsl,ecm"; 177*4882a593Smuzhiyun reg = <0x1000 0x1000>; 178*4882a593Smuzhiyun interrupts = <16 2 0 0>; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun memory-controller@2000 { 182*4882a593Smuzhiyun compatible = "fsl,p1023-memory-controller"; 183*4882a593Smuzhiyun reg = <0x2000 0x1000>; 184*4882a593Smuzhiyun interrupts = <16 2 0 0>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun/include/ "pq3-i2c-0.dtsi" 188*4882a593Smuzhiyun/include/ "pq3-i2c-1.dtsi" 189*4882a593Smuzhiyun/include/ "pq3-duart-0.dtsi" 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun/include/ "pq3-espi-0.dtsi" 192*4882a593Smuzhiyun spi@7000 { 193*4882a593Smuzhiyun fsl,espi-num-chipselects = <4>; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun/include/ "pq3-gpio-0.dtsi" 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun L2: l2-cache-controller@20000 { 199*4882a593Smuzhiyun compatible = "fsl,p1023-l2-cache-controller"; 200*4882a593Smuzhiyun reg = <0x20000 0x1000>; 201*4882a593Smuzhiyun cache-line-size = <32>; // 32 bytes 202*4882a593Smuzhiyun cache-size = <0x40000>; // L2,256K 203*4882a593Smuzhiyun interrupts = <16 2 0 0>; 204*4882a593Smuzhiyun }; 205*4882a593Smuzhiyun 206*4882a593Smuzhiyun/include/ "pq3-dma-0.dtsi" 207*4882a593Smuzhiyun/include/ "pq3-usb2-dr-0.dtsi" 208*4882a593Smuzhiyun usb@22000 { 209*4882a593Smuzhiyun compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun crypto: crypto@300000 { 213*4882a593Smuzhiyun compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; 214*4882a593Smuzhiyun fsl,sec-era = <3>; 215*4882a593Smuzhiyun #address-cells = <1>; 216*4882a593Smuzhiyun #size-cells = <1>; 217*4882a593Smuzhiyun reg = <0x30000 0x10000>; 218*4882a593Smuzhiyun ranges = <0 0x30000 0x10000>; 219*4882a593Smuzhiyun interrupts = <58 2 0 0>; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun sec_jr0: jr@1000 { 222*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-job-ring", 223*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring"; 224*4882a593Smuzhiyun reg = <0x1000 0x1000>; 225*4882a593Smuzhiyun interrupts = <45 2 0 0>; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun sec_jr1: jr@2000 { 229*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-job-ring", 230*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring"; 231*4882a593Smuzhiyun reg = <0x2000 0x1000>; 232*4882a593Smuzhiyun interrupts = <45 2 0 0>; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun sec_jr2: jr@3000 { 236*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-job-ring", 237*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring"; 238*4882a593Smuzhiyun reg = <0x3000 0x1000>; 239*4882a593Smuzhiyun interrupts = <57 2 0 0>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun sec_jr3: jr@4000 { 243*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-job-ring", 244*4882a593Smuzhiyun "fsl,sec-v4.0-job-ring"; 245*4882a593Smuzhiyun reg = <0x4000 0x1000>; 246*4882a593Smuzhiyun interrupts = <57 2 0 0>; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun rtic@6000 { 250*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-rtic", 251*4882a593Smuzhiyun "fsl,sec-v4.0-rtic"; 252*4882a593Smuzhiyun #address-cells = <1>; 253*4882a593Smuzhiyun #size-cells = <1>; 254*4882a593Smuzhiyun reg = <0x6000 0x100>; 255*4882a593Smuzhiyun ranges = <0x0 0x6100 0xe00>; 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun rtic_a: rtic-a@0 { 258*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-rtic-memory", 259*4882a593Smuzhiyun "fsl,sec-v4.0-rtic-memory"; 260*4882a593Smuzhiyun reg = <0x00 0x20 0x100 0x80>; 261*4882a593Smuzhiyun }; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun rtic_b: rtic-b@20 { 264*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-rtic-memory", 265*4882a593Smuzhiyun "fsl,sec-v4.0-rtic-memory"; 266*4882a593Smuzhiyun reg = <0x20 0x20 0x200 0x80>; 267*4882a593Smuzhiyun }; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun rtic_c: rtic-c@40 { 270*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-rtic-memory", 271*4882a593Smuzhiyun "fsl,sec-v4.0-rtic-memory"; 272*4882a593Smuzhiyun reg = <0x40 0x20 0x300 0x80>; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun rtic_d: rtic-d@60 { 276*4882a593Smuzhiyun compatible = "fsl,sec-v4.2-rtic-memory", 277*4882a593Smuzhiyun "fsl,sec-v4.0-rtic-memory"; 278*4882a593Smuzhiyun reg = <0x60 0x20 0x500 0x80>; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun }; 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun/include/ "pq3-mpic.dtsi" 284*4882a593Smuzhiyun/include/ "pq3-mpic-timer-B.dtsi" 285*4882a593Smuzhiyun 286*4882a593Smuzhiyun qman: qman@88000 { 287*4882a593Smuzhiyun compatible = "fsl,qman"; 288*4882a593Smuzhiyun reg = <0x88000 0x1000>; 289*4882a593Smuzhiyun interrupts = <16 2 0 0>; 290*4882a593Smuzhiyun fsl,qman-portals = <&qportals>; 291*4882a593Smuzhiyun memory-region = <&qman_fqd &qman_pfdr>; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun bman: bman@8a000 { 295*4882a593Smuzhiyun compatible = "fsl,bman"; 296*4882a593Smuzhiyun reg = <0x8a000 0x1000>; 297*4882a593Smuzhiyun interrupts = <16 2 0 0>; 298*4882a593Smuzhiyun fsl,bman-portals = <&bportals>; 299*4882a593Smuzhiyun memory-region = <&bman_fbpr>; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun global-utilities@e0000 { 303*4882a593Smuzhiyun compatible = "fsl,p1023-guts"; 304*4882a593Smuzhiyun reg = <0xe0000 0x1000>; 305*4882a593Smuzhiyun fsl,has-rstcr; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun}; 308