1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * P1023 RDB Device Tree Source 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2013 - 2014 Freescale Semiconductor Inc. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Author: Chunhe Lan <Chunhe.Lan@freescale.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without 9*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met: 10*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright 11*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer. 12*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright 13*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in the 14*4882a593Smuzhiyun * documentation and/or other materials provided with the distribution. 15*4882a593Smuzhiyun * * Neither the name of Freescale Semiconductor nor the 16*4882a593Smuzhiyun * names of its contributors may be used to endorse or promote products 17*4882a593Smuzhiyun * derived from this software without specific prior written permission. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the 21*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software 22*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any 23*4882a593Smuzhiyun * later version. 24*4882a593Smuzhiyun * 25*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 26*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 27*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 29*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 31*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 32*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 34*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35*4882a593Smuzhiyun */ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun/include/ "p1023si-pre.dtsi" 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun/ { 40*4882a593Smuzhiyun model = "fsl,P1023"; 41*4882a593Smuzhiyun compatible = "fsl,P1023RDB"; 42*4882a593Smuzhiyun #address-cells = <2>; 43*4882a593Smuzhiyun #size-cells = <2>; 44*4882a593Smuzhiyun interrupt-parent = <&mpic>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun memory { 47*4882a593Smuzhiyun device_type = "memory"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun reserved-memory { 51*4882a593Smuzhiyun #address-cells = <2>; 52*4882a593Smuzhiyun #size-cells = <2>; 53*4882a593Smuzhiyun ranges; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun bman_fbpr: bman-fbpr { 56*4882a593Smuzhiyun size = <0 0x1000000>; 57*4882a593Smuzhiyun alignment = <0 0x1000000>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun qman_fqd: qman-fqd { 60*4882a593Smuzhiyun size = <0 0x400000>; 61*4882a593Smuzhiyun alignment = <0 0x400000>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun qman_pfdr: qman-pfdr { 64*4882a593Smuzhiyun size = <0 0x2000000>; 65*4882a593Smuzhiyun alignment = <0 0x2000000>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun qportals: qman-portals@ff000000 { 70*4882a593Smuzhiyun ranges = <0x0 0xf 0xff000000 0x200000>; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun bportals: bman-portals@ff200000 { 74*4882a593Smuzhiyun ranges = <0x0 0xf 0xff200000 0x200000>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun soc: soc@ff600000 { 78*4882a593Smuzhiyun ranges = <0x0 0x0 0xff600000 0x200000>; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun i2c@3000 { 81*4882a593Smuzhiyun eeprom@53 { 82*4882a593Smuzhiyun compatible = "atmel,24c04"; 83*4882a593Smuzhiyun reg = <0x53>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun rtc@6f { 87*4882a593Smuzhiyun compatible = "microchip,mcp7941x"; 88*4882a593Smuzhiyun reg = <0x6f>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun usb@22000 { 93*4882a593Smuzhiyun dr_mode = "host"; 94*4882a593Smuzhiyun phy_type = "ulpi"; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun lbc: localbus@ff605000 { 99*4882a593Smuzhiyun reg = <0 0xff605000 0 0x1000>; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun /* NOR, NAND Flashes */ 102*4882a593Smuzhiyun ranges = <0x0 0x0 0x0 0xec000000 0x04000000 103*4882a593Smuzhiyun 0x1 0x0 0x0 0xffa00000 0x08000000>; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun nor@0,0 { 106*4882a593Smuzhiyun #address-cells = <1>; 107*4882a593Smuzhiyun #size-cells = <1>; 108*4882a593Smuzhiyun compatible = "cfi-flash"; 109*4882a593Smuzhiyun reg = <0x0 0x0 0x04000000>; 110*4882a593Smuzhiyun bank-width = <2>; 111*4882a593Smuzhiyun device-width = <1>; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun partition@0 { 114*4882a593Smuzhiyun /* 48MB for Root File System */ 115*4882a593Smuzhiyun reg = <0x00000000 0x03000000>; 116*4882a593Smuzhiyun label = "NOR Root File System"; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun partition@3000000 { 120*4882a593Smuzhiyun /* 1MB for DTB Image */ 121*4882a593Smuzhiyun reg = <0x03000000 0x00100000>; 122*4882a593Smuzhiyun label = "NOR DTB Image"; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun partition@3100000 { 126*4882a593Smuzhiyun /* 14MB for Linux Kernel Image */ 127*4882a593Smuzhiyun reg = <0x03100000 0x00e00000>; 128*4882a593Smuzhiyun label = "NOR Linux Kernel Image"; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun partition@3f00000 { 132*4882a593Smuzhiyun /* This location must not be altered */ 133*4882a593Smuzhiyun /* 512KB for u-boot Bootloader Image */ 134*4882a593Smuzhiyun /* 512KB for u-boot Environment Variables */ 135*4882a593Smuzhiyun reg = <0x03f00000 0x00100000>; 136*4882a593Smuzhiyun label = "NOR U-Boot Image"; 137*4882a593Smuzhiyun read-only; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun nand@1,0 { 142*4882a593Smuzhiyun #address-cells = <1>; 143*4882a593Smuzhiyun #size-cells = <1>; 144*4882a593Smuzhiyun compatible = "fsl,elbc-fcm-nand"; 145*4882a593Smuzhiyun reg = <0x1 0x0 0x40000>; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun partition@0 { 148*4882a593Smuzhiyun /* This location must not be altered */ 149*4882a593Smuzhiyun /* 1MB for u-boot Bootloader Image */ 150*4882a593Smuzhiyun reg = <0x0 0x00100000>; 151*4882a593Smuzhiyun label = "NAND U-Boot Image"; 152*4882a593Smuzhiyun read-only; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun partition@100000 { 156*4882a593Smuzhiyun /* 1MB for DTB Image */ 157*4882a593Smuzhiyun reg = <0x00100000 0x00100000>; 158*4882a593Smuzhiyun label = "NAND DTB Image"; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun partition@200000 { 162*4882a593Smuzhiyun /* 14MB for Linux Kernel Image */ 163*4882a593Smuzhiyun reg = <0x00200000 0x00e00000>; 164*4882a593Smuzhiyun label = "NAND Linux Kernel Image"; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun partition@1000000 { 168*4882a593Smuzhiyun /* 96MB for Root File System Image */ 169*4882a593Smuzhiyun reg = <0x01000000 0x06000000>; 170*4882a593Smuzhiyun label = "NAND Root File System"; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun partition@7000000 { 174*4882a593Smuzhiyun /* 16MB for User Writable Area */ 175*4882a593Smuzhiyun reg = <0x07000000 0x01000000>; 176*4882a593Smuzhiyun label = "NAND Writable User area"; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun }; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun pci0: pcie@ff60a000 { 182*4882a593Smuzhiyun reg = <0 0xff60a000 0 0x1000>; 183*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 184*4882a593Smuzhiyun 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; 185*4882a593Smuzhiyun pcie@0 { 186*4882a593Smuzhiyun /* IRQ[0:3] are pulled up on board, set to active-low */ 187*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 7>; 188*4882a593Smuzhiyun interrupt-map = < 189*4882a593Smuzhiyun /* IDSEL 0x0 */ 190*4882a593Smuzhiyun 0000 0 0 1 &mpic 0 1 0 0 191*4882a593Smuzhiyun 0000 0 0 2 &mpic 1 1 0 0 192*4882a593Smuzhiyun 0000 0 0 3 &mpic 2 1 0 0 193*4882a593Smuzhiyun 0000 0 0 4 &mpic 3 1 0 0 194*4882a593Smuzhiyun >; 195*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xc0000000 196*4882a593Smuzhiyun 0x2000000 0x0 0xc0000000 197*4882a593Smuzhiyun 0x0 0x20000000 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun 0x1000000 0x0 0x0 200*4882a593Smuzhiyun 0x1000000 0x0 0x0 201*4882a593Smuzhiyun 0x0 0x100000>; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun board_pci1: pci1: pcie@ff609000 { 206*4882a593Smuzhiyun reg = <0 0xff609000 0 0x1000>; 207*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 208*4882a593Smuzhiyun 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; 209*4882a593Smuzhiyun pcie@0 { 210*4882a593Smuzhiyun /* 211*4882a593Smuzhiyun * IRQ[4:6] only for PCIe, set to active-high, 212*4882a593Smuzhiyun * IRQ[7] is pulled up on board, set to active-low 213*4882a593Smuzhiyun */ 214*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 7>; 215*4882a593Smuzhiyun interrupt-map = < 216*4882a593Smuzhiyun /* IDSEL 0x0 */ 217*4882a593Smuzhiyun 0000 0 0 1 &mpic 4 2 0 0 218*4882a593Smuzhiyun 0000 0 0 2 &mpic 5 2 0 0 219*4882a593Smuzhiyun 0000 0 0 3 &mpic 6 2 0 0 220*4882a593Smuzhiyun 0000 0 0 4 &mpic 7 1 0 0 221*4882a593Smuzhiyun >; 222*4882a593Smuzhiyun ranges = <0x2000000 0x0 0xa0000000 223*4882a593Smuzhiyun 0x2000000 0x0 0xa0000000 224*4882a593Smuzhiyun 0x0 0x20000000 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun 0x1000000 0x0 0x0 227*4882a593Smuzhiyun 0x1000000 0x0 0x0 228*4882a593Smuzhiyun 0x0 0x100000>; 229*4882a593Smuzhiyun }; 230*4882a593Smuzhiyun }; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun pci2: pcie@ff60b000 { 233*4882a593Smuzhiyun reg = <0 0xff60b000 0 0x1000>; 234*4882a593Smuzhiyun ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 235*4882a593Smuzhiyun 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; 236*4882a593Smuzhiyun pcie@0 { 237*4882a593Smuzhiyun /* 238*4882a593Smuzhiyun * IRQ[8:10] are pulled up on board, set to active-low 239*4882a593Smuzhiyun * IRQ[11] only for PCIe, set to active-high, 240*4882a593Smuzhiyun */ 241*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0 0 7>; 242*4882a593Smuzhiyun interrupt-map = < 243*4882a593Smuzhiyun /* IDSEL 0x0 */ 244*4882a593Smuzhiyun 0000 0 0 1 &mpic 8 1 0 0 245*4882a593Smuzhiyun 0000 0 0 2 &mpic 9 1 0 0 246*4882a593Smuzhiyun 0000 0 0 3 &mpic 10 1 0 0 247*4882a593Smuzhiyun 0000 0 0 4 &mpic 11 2 0 0 248*4882a593Smuzhiyun >; 249*4882a593Smuzhiyun ranges = <0x2000000 0x0 0x80000000 250*4882a593Smuzhiyun 0x2000000 0x0 0x80000000 251*4882a593Smuzhiyun 0x0 0x20000000 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun 0x1000000 0x0 0x0 254*4882a593Smuzhiyun 0x1000000 0x0 0x0 255*4882a593Smuzhiyun 0x0 0x100000>; 256*4882a593Smuzhiyun }; 257*4882a593Smuzhiyun }; 258*4882a593Smuzhiyun}; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun/include/ "p1023si-post.dtsi" 261