xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * P1022/P1013 Silicon/SoC Device Tree Source (post include)
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2011 Freescale Semiconductor Inc.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met:
8*4882a593Smuzhiyun *     * Redistributions of source code must retain the above copyright
9*4882a593Smuzhiyun *       notice, this list of conditions and the following disclaimer.
10*4882a593Smuzhiyun *     * Redistributions in binary form must reproduce the above copyright
11*4882a593Smuzhiyun *       notice, this list of conditions and the following disclaimer in the
12*4882a593Smuzhiyun *       documentation and/or other materials provided with the distribution.
13*4882a593Smuzhiyun *     * Neither the name of Freescale Semiconductor nor the
14*4882a593Smuzhiyun *       names of its contributors may be used to endorse or promote products
15*4882a593Smuzhiyun *       derived from this software without specific prior written permission.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the
19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software
20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any
21*4882a593Smuzhiyun * later version.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun&lbc {
36*4882a593Smuzhiyun	#address-cells = <2>;
37*4882a593Smuzhiyun	#size-cells = <1>;
38*4882a593Smuzhiyun	/*
39*4882a593Smuzhiyun	 * The localbus on the P1022 is not a simple-bus because of the eLBC
40*4882a593Smuzhiyun	 * pin muxing when the DIU is enabled.
41*4882a593Smuzhiyun	 */
42*4882a593Smuzhiyun	compatible = "fsl,p1022-elbc", "fsl,elbc";
43*4882a593Smuzhiyun	interrupts = <19 2 0 0>,
44*4882a593Smuzhiyun		     <16 2 0 0>;
45*4882a593Smuzhiyun};
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun/* controller at 0x9000 */
48*4882a593Smuzhiyun&pci0 {
49*4882a593Smuzhiyun	compatible = "fsl,mpc8548-pcie";
50*4882a593Smuzhiyun	device_type = "pci";
51*4882a593Smuzhiyun	#size-cells = <2>;
52*4882a593Smuzhiyun	#address-cells = <3>;
53*4882a593Smuzhiyun	bus-range = <0 255>;
54*4882a593Smuzhiyun	clock-frequency = <33333333>;
55*4882a593Smuzhiyun	interrupts = <16 2 0 0>;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	pcie@0 {
58*4882a593Smuzhiyun		reg = <0 0 0 0 0>;
59*4882a593Smuzhiyun		#interrupt-cells = <1>;
60*4882a593Smuzhiyun		#size-cells = <2>;
61*4882a593Smuzhiyun		#address-cells = <3>;
62*4882a593Smuzhiyun		device_type = "pci";
63*4882a593Smuzhiyun		interrupts = <16 2 0 0>;
64*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0 0 7>;
65*4882a593Smuzhiyun		interrupt-map = <
66*4882a593Smuzhiyun			/* IDSEL 0x0 */
67*4882a593Smuzhiyun			0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
68*4882a593Smuzhiyun			0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
69*4882a593Smuzhiyun			0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
70*4882a593Smuzhiyun			0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
71*4882a593Smuzhiyun			>;
72*4882a593Smuzhiyun	};
73*4882a593Smuzhiyun};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun/* controller at 0xa000 */
76*4882a593Smuzhiyun&pci1 {
77*4882a593Smuzhiyun	compatible = "fsl,mpc8548-pcie";
78*4882a593Smuzhiyun	device_type = "pci";
79*4882a593Smuzhiyun	#size-cells = <2>;
80*4882a593Smuzhiyun	#address-cells = <3>;
81*4882a593Smuzhiyun	bus-range = <0 255>;
82*4882a593Smuzhiyun	clock-frequency = <33333333>;
83*4882a593Smuzhiyun	interrupts = <16 2 0 0>;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	pcie@0 {
86*4882a593Smuzhiyun		reg = <0 0 0 0 0>;
87*4882a593Smuzhiyun		#interrupt-cells = <1>;
88*4882a593Smuzhiyun		#size-cells = <2>;
89*4882a593Smuzhiyun		#address-cells = <3>;
90*4882a593Smuzhiyun		device_type = "pci";
91*4882a593Smuzhiyun		interrupts = <16 2 0 0>;
92*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0 0 7>;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun		interrupt-map = <
95*4882a593Smuzhiyun			/* IDSEL 0x0 */
96*4882a593Smuzhiyun			0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
97*4882a593Smuzhiyun			0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
98*4882a593Smuzhiyun			0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
99*4882a593Smuzhiyun			0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
100*4882a593Smuzhiyun			>;
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun/* controller at 0xb000 */
105*4882a593Smuzhiyun&pci2 {
106*4882a593Smuzhiyun	compatible = "fsl,mpc8548-pcie";
107*4882a593Smuzhiyun	device_type = "pci";
108*4882a593Smuzhiyun	#size-cells = <2>;
109*4882a593Smuzhiyun	#address-cells = <3>;
110*4882a593Smuzhiyun	bus-range = <0 255>;
111*4882a593Smuzhiyun	clock-frequency = <33333333>;
112*4882a593Smuzhiyun	interrupts = <16 2 0 0>;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun	pcie@0 {
115*4882a593Smuzhiyun		reg = <0 0 0 0 0>;
116*4882a593Smuzhiyun		#interrupt-cells = <1>;
117*4882a593Smuzhiyun		#size-cells = <2>;
118*4882a593Smuzhiyun		#address-cells = <3>;
119*4882a593Smuzhiyun		device_type = "pci";
120*4882a593Smuzhiyun		interrupts = <16 2 0 0>;
121*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0 0 7>;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		interrupt-map = <
124*4882a593Smuzhiyun			/* IDSEL 0x0 */
125*4882a593Smuzhiyun			0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
126*4882a593Smuzhiyun			0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
127*4882a593Smuzhiyun			0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
128*4882a593Smuzhiyun			0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
129*4882a593Smuzhiyun			>;
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun&soc {
134*4882a593Smuzhiyun	#address-cells = <1>;
135*4882a593Smuzhiyun	#size-cells = <1>;
136*4882a593Smuzhiyun	device_type = "soc";
137*4882a593Smuzhiyun	compatible = "fsl,p1022-immr", "simple-bus";
138*4882a593Smuzhiyun	bus-frequency = <0>;		// Filled out by uboot.
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	ecm-law@0 {
141*4882a593Smuzhiyun		compatible = "fsl,ecm-law";
142*4882a593Smuzhiyun		reg = <0x0 0x1000>;
143*4882a593Smuzhiyun		fsl,num-laws = <12>;
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	ecm@1000 {
147*4882a593Smuzhiyun		compatible = "fsl,p1022-ecm", "fsl,ecm";
148*4882a593Smuzhiyun		reg = <0x1000 0x1000>;
149*4882a593Smuzhiyun		interrupts = <16 2 0 0>;
150*4882a593Smuzhiyun	};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun	memory-controller@2000 {
153*4882a593Smuzhiyun		compatible = "fsl,p1022-memory-controller";
154*4882a593Smuzhiyun		reg = <0x2000 0x1000>;
155*4882a593Smuzhiyun		interrupts = <16 2 0 0>;
156*4882a593Smuzhiyun	};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun/include/ "pq3-i2c-0.dtsi"
159*4882a593Smuzhiyun/include/ "pq3-i2c-1.dtsi"
160*4882a593Smuzhiyun/include/ "pq3-duart-0.dtsi"
161*4882a593Smuzhiyun/include/ "pq3-espi-0.dtsi"
162*4882a593Smuzhiyun	spi@7000 {
163*4882a593Smuzhiyun		fsl,espi-num-chipselects = <4>;
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun/include/ "pq3-dma-1.dtsi"
167*4882a593Smuzhiyun	dma@c300 {
168*4882a593Smuzhiyun		dma00: dma-channel@0 {
169*4882a593Smuzhiyun			compatible = "fsl,ssi-dma-channel";
170*4882a593Smuzhiyun		};
171*4882a593Smuzhiyun		dma01: dma-channel@80 {
172*4882a593Smuzhiyun			compatible = "fsl,ssi-dma-channel";
173*4882a593Smuzhiyun		};
174*4882a593Smuzhiyun	};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun/include/ "pq3-gpio-0.dtsi"
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun	display: display@10000 {
179*4882a593Smuzhiyun		compatible = "fsl,diu", "fsl,p1022-diu";
180*4882a593Smuzhiyun		reg = <0x10000 1000>;
181*4882a593Smuzhiyun		interrupts = <64 2 0 0>;
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun	ssi@15000 {
185*4882a593Smuzhiyun		compatible = "fsl,mpc8610-ssi";
186*4882a593Smuzhiyun		cell-index = <0>;
187*4882a593Smuzhiyun		reg = <0x15000 0x100>;
188*4882a593Smuzhiyun		interrupts = <75 2 0 0>;
189*4882a593Smuzhiyun		fsl,playback-dma = <&dma00>;
190*4882a593Smuzhiyun		fsl,capture-dma = <&dma01>;
191*4882a593Smuzhiyun		fsl,fifo-depth = <15>;
192*4882a593Smuzhiyun	};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun/include/ "pq3-sata2-0.dtsi"
195*4882a593Smuzhiyun/include/ "pq3-sata2-1.dtsi"
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun	L2: l2-cache-controller@20000 {
198*4882a593Smuzhiyun		compatible = "fsl,p1022-l2-cache-controller";
199*4882a593Smuzhiyun		reg = <0x20000 0x1000>;
200*4882a593Smuzhiyun		cache-line-size = <32>;	// 32 bytes
201*4882a593Smuzhiyun		cache-size = <0x40000>; // L2,256K
202*4882a593Smuzhiyun		interrupts = <16 2 0 0>;
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun/include/ "pq3-dma-0.dtsi"
206*4882a593Smuzhiyun/include/ "pq3-usb2-dr-0.dtsi"
207*4882a593Smuzhiyun	usb@22000 {
208*4882a593Smuzhiyun		compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
209*4882a593Smuzhiyun	};
210*4882a593Smuzhiyun/include/ "pq3-usb2-dr-1.dtsi"
211*4882a593Smuzhiyun	usb@23000 {
212*4882a593Smuzhiyun		compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
213*4882a593Smuzhiyun	};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun/include/ "pq3-esdhc-0.dtsi"
216*4882a593Smuzhiyun	sdhc@2e000 {
217*4882a593Smuzhiyun		compatible = "fsl,p1022-esdhc", "fsl,esdhc";
218*4882a593Smuzhiyun		sdhci,auto-cmd12;
219*4882a593Smuzhiyun	};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun/include/ "pq3-sec3.3-0.dtsi"
222*4882a593Smuzhiyun/include/ "pq3-mpic.dtsi"
223*4882a593Smuzhiyun/include/ "pq3-mpic-timer-B.dtsi"
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun/include/ "pq3-etsec2-0.dtsi"
226*4882a593Smuzhiyun	enet0: enet0_grp2: ethernet@b0000 {
227*4882a593Smuzhiyun		fsl,wake-on-filer;
228*4882a593Smuzhiyun	};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun/include/ "pq3-etsec2-1.dtsi"
231*4882a593Smuzhiyun	enet1: enet1_grp2: ethernet@b1000 {
232*4882a593Smuzhiyun		fsl,wake-on-filer;
233*4882a593Smuzhiyun	};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun	global-utilities@e0000 {
236*4882a593Smuzhiyun		compatible = "fsl,p1022-guts";
237*4882a593Smuzhiyun		reg = <0xe0000 0x1000>;
238*4882a593Smuzhiyun		fsl,has-rstcr;
239*4882a593Smuzhiyun	};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun	power@e0070{
242*4882a593Smuzhiyun		compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
243*4882a593Smuzhiyun		reg = <0xe0070 0x20>;
244*4882a593Smuzhiyun	};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun/include/ "pq3-etsec2-grp2-0.dtsi"
249*4882a593Smuzhiyun/include/ "pq3-etsec2-grp2-1.dtsi"
250