xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/p1022rdk.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * P1022 RDK 32-bit Physical Address Map Device Tree Source
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2012 Freescale Semiconductor Inc.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met:
8*4882a593Smuzhiyun *     * Redistributions of source code must retain the above copyright
9*4882a593Smuzhiyun *       notice, this list of conditions and the following disclaimer.
10*4882a593Smuzhiyun *     * Redistributions in binary form must reproduce the above copyright
11*4882a593Smuzhiyun *       notice, this list of conditions and the following disclaimer in the
12*4882a593Smuzhiyun *       documentation and/or other materials provided with the distribution.
13*4882a593Smuzhiyun *     * Neither the name of Freescale Semiconductor nor the
14*4882a593Smuzhiyun *       names of its contributors may be used to endorse or promote products
15*4882a593Smuzhiyun *       derived from this software without specific prior written permission.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the
19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software
20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any
21*4882a593Smuzhiyun * later version.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun/include/ "p1022si-pre.dtsi"
36*4882a593Smuzhiyun/ {
37*4882a593Smuzhiyun	model = "fsl,P1022RDK";
38*4882a593Smuzhiyun	compatible = "fsl,P1022RDK";
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	memory {
41*4882a593Smuzhiyun		device_type = "memory";
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun	board_lbc: lbc: localbus@ffe05000 {
45*4882a593Smuzhiyun		/* The P1022 RDK does not have any localbus devices */
46*4882a593Smuzhiyun		status = "disabled";
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	board_soc: soc: soc@ffe00000 {
50*4882a593Smuzhiyun		ranges = <0x0 0x0 0xffe00000 0x100000>;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun		i2c@3100 {
53*4882a593Smuzhiyun			wm8960:codec@1a {
54*4882a593Smuzhiyun				compatible = "wlf,wm8960";
55*4882a593Smuzhiyun				reg = <0x1a>;
56*4882a593Smuzhiyun				/* MCLK source is a stand-alone oscillator */
57*4882a593Smuzhiyun				clock-frequency = <12288000>;
58*4882a593Smuzhiyun			};
59*4882a593Smuzhiyun			rtc@68 {
60*4882a593Smuzhiyun				compatible = "st,m41t62";
61*4882a593Smuzhiyun				reg = <0x68>;
62*4882a593Smuzhiyun			};
63*4882a593Smuzhiyun			adt7461@4c{
64*4882a593Smuzhiyun				compatible = "adi,adt7461";
65*4882a593Smuzhiyun				reg = <0x4c>;
66*4882a593Smuzhiyun			};
67*4882a593Smuzhiyun			zl6100@21{
68*4882a593Smuzhiyun				compatible = "isil,zl6100";
69*4882a593Smuzhiyun				reg = <0x21>;
70*4882a593Smuzhiyun			};
71*4882a593Smuzhiyun			zl6100@24{
72*4882a593Smuzhiyun				compatible = "isil,zl6100";
73*4882a593Smuzhiyun				reg = <0x24>;
74*4882a593Smuzhiyun			};
75*4882a593Smuzhiyun			zl6100@26{
76*4882a593Smuzhiyun				compatible = "isil,zl6100";
77*4882a593Smuzhiyun				reg = <0x26>;
78*4882a593Smuzhiyun			};
79*4882a593Smuzhiyun			zl6100@29{
80*4882a593Smuzhiyun				compatible = "isil,zl6100";
81*4882a593Smuzhiyun				reg = <0x29>;
82*4882a593Smuzhiyun			};
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		spi@7000 {
86*4882a593Smuzhiyun			flash@0 {
87*4882a593Smuzhiyun				#address-cells = <1>;
88*4882a593Smuzhiyun				#size-cells = <1>;
89*4882a593Smuzhiyun				compatible = "spansion,m25p80", "jedec,spi-nor";
90*4882a593Smuzhiyun				reg = <0>;
91*4882a593Smuzhiyun				spi-max-frequency = <1000000>;
92*4882a593Smuzhiyun				partition@0 {
93*4882a593Smuzhiyun					label = "full-spi-flash";
94*4882a593Smuzhiyun					reg = <0x00000000 0x00100000>;
95*4882a593Smuzhiyun				};
96*4882a593Smuzhiyun			};
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		ssi@15000 {
100*4882a593Smuzhiyun			fsl,mode = "i2s-slave";
101*4882a593Smuzhiyun			codec-handle = <&wm8960>;
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun		usb@22000 {
105*4882a593Smuzhiyun			phy_type = "ulpi";
106*4882a593Smuzhiyun		};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun		usb@23000 {
109*4882a593Smuzhiyun			phy_type = "ulpi";
110*4882a593Smuzhiyun		};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun		mdio@24000 {
113*4882a593Smuzhiyun			phy0: ethernet-phy@0 {
114*4882a593Smuzhiyun				interrupts = <3 1 0 0>;
115*4882a593Smuzhiyun				reg = <0x1>;
116*4882a593Smuzhiyun			};
117*4882a593Smuzhiyun			phy1: ethernet-phy@1 {
118*4882a593Smuzhiyun				interrupts = <9 1 0 0>;
119*4882a593Smuzhiyun				reg = <0x2>;
120*4882a593Smuzhiyun			};
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun		mdio@25000 {
124*4882a593Smuzhiyun			tbi0: tbi-phy@11 {
125*4882a593Smuzhiyun				reg = <0x11>;
126*4882a593Smuzhiyun				device_type = "tbi-phy";
127*4882a593Smuzhiyun			};
128*4882a593Smuzhiyun		};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun		ethernet@b0000 {
131*4882a593Smuzhiyun			phy-handle = <&phy0>;
132*4882a593Smuzhiyun			phy-connection-type = "rgmii-id";
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun		ethernet@b1000 {
136*4882a593Smuzhiyun			phy-handle = <&phy1>;
137*4882a593Smuzhiyun			tbi-handle = <&tbi0>;
138*4882a593Smuzhiyun			phy-connection-type = "sgmii";
139*4882a593Smuzhiyun		};
140*4882a593Smuzhiyun	};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun	pci0: pcie@ffe09000 {
143*4882a593Smuzhiyun		ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
144*4882a593Smuzhiyun			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
145*4882a593Smuzhiyun		reg = <0x0 0xffe09000 0 0x1000>;
146*4882a593Smuzhiyun		pcie@0 {
147*4882a593Smuzhiyun			ranges = <0x2000000 0x0 0xe0000000
148*4882a593Smuzhiyun				  0x2000000 0x0 0xe0000000
149*4882a593Smuzhiyun				  0x0 0x20000000
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun				  0x1000000 0x0 0x0
152*4882a593Smuzhiyun				  0x1000000 0x0 0x0
153*4882a593Smuzhiyun				  0x0 0x100000>;
154*4882a593Smuzhiyun		};
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun	pci1: pcie@ffe0a000 {
158*4882a593Smuzhiyun		ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
159*4882a593Smuzhiyun			  0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
160*4882a593Smuzhiyun		reg = <0 0xffe0a000 0 0x1000>;
161*4882a593Smuzhiyun		pcie@0 {
162*4882a593Smuzhiyun			ranges = <0x2000000 0x0 0xe0000000
163*4882a593Smuzhiyun				  0x2000000 0x0 0xe0000000
164*4882a593Smuzhiyun				  0x0 0x20000000
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun				  0x1000000 0x0 0x0
167*4882a593Smuzhiyun				  0x1000000 0x0 0x0
168*4882a593Smuzhiyun				  0x0 0x100000>;
169*4882a593Smuzhiyun		};
170*4882a593Smuzhiyun	};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun	pci2: pcie@ffe0b000 {
173*4882a593Smuzhiyun		ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
174*4882a593Smuzhiyun			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
175*4882a593Smuzhiyun		reg = <0 0xffe0b000 0 0x1000>;
176*4882a593Smuzhiyun		pcie@0 {
177*4882a593Smuzhiyun			ranges = <0x2000000 0x0 0xe0000000
178*4882a593Smuzhiyun				  0x2000000 0x0 0xe0000000
179*4882a593Smuzhiyun				  0x0 0x20000000
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun				  0x1000000 0x0 0x0
182*4882a593Smuzhiyun				  0x1000000 0x0 0x0
183*4882a593Smuzhiyun				  0x0 0x100000>;
184*4882a593Smuzhiyun		};
185*4882a593Smuzhiyun	};
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun/include/ "p1022si-post.dtsi"
189