xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/mvme7100.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device tree source for the Emerson/Artesyn MVME7100
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Alessio Igor Bogani <alessio.bogani@elettra.eu>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/include/ "mpc8641si-pre.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "MVME7100";
14*4882a593Smuzhiyun	compatible = "artesyn,MVME7100";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	memory {
17*4882a593Smuzhiyun		device_type = "memory";
18*4882a593Smuzhiyun		reg = <0x00000000 0x80000000>;
19*4882a593Smuzhiyun	};
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	soc: soc@f1000000 {
22*4882a593Smuzhiyun		ranges = <0x00000000 0xf1000000 0x00100000>;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		i2c@3000 {
25*4882a593Smuzhiyun			hwmon@4c {
26*4882a593Smuzhiyun				compatible = "dallas,max6649";
27*4882a593Smuzhiyun				reg = <0x4c>;
28*4882a593Smuzhiyun			};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun			rtc@68 {
31*4882a593Smuzhiyun				status = "disabled";
32*4882a593Smuzhiyun			};
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun		enet0: ethernet@24000 {
37*4882a593Smuzhiyun			phy-handle = <&phy0>;
38*4882a593Smuzhiyun			phy-connection-type = "rgmii-id";
39*4882a593Smuzhiyun		};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		mdio@24520 {
42*4882a593Smuzhiyun			phy0: ethernet-phy@1 {
43*4882a593Smuzhiyun				reg = <1>;
44*4882a593Smuzhiyun			};
45*4882a593Smuzhiyun			phy1: ethernet-phy@2 {
46*4882a593Smuzhiyun				reg = <2>;
47*4882a593Smuzhiyun			};
48*4882a593Smuzhiyun			phy2: ethernet-phy@3 {
49*4882a593Smuzhiyun				reg = <3>;
50*4882a593Smuzhiyun			};
51*4882a593Smuzhiyun			phy3: ethernet-phy@4 {
52*4882a593Smuzhiyun				reg = <4>;
53*4882a593Smuzhiyun			};
54*4882a593Smuzhiyun		};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		enet1: ethernet@25000 {
57*4882a593Smuzhiyun			phy-handle = <&phy1>;
58*4882a593Smuzhiyun			phy-connection-type = "rgmii-id";
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun		mdio@25520 {
62*4882a593Smuzhiyun			status = "disabled";
63*4882a593Smuzhiyun		};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun		enet2: ethernet@26000 {
66*4882a593Smuzhiyun			phy-handle = <&phy2>;
67*4882a593Smuzhiyun			phy-connection-type = "rgmii-id";
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun		mdio@26520 {
71*4882a593Smuzhiyun			status = "disabled";
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		enet3: ethernet@27000 {
75*4882a593Smuzhiyun			phy-handle = <&phy3>;
76*4882a593Smuzhiyun			phy-connection-type = "rgmii-id";
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		mdio@27520 {
80*4882a593Smuzhiyun			status = "disabled";
81*4882a593Smuzhiyun		};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		serial1: serial@4600 {
84*4882a593Smuzhiyun			status = "disabled";
85*4882a593Smuzhiyun		};
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun	lbc: localbus@f1005000 {
89*4882a593Smuzhiyun		reg = <0xf1005000 0x1000>;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun		ranges = <0 0 0xf8000000 0x08000000	// NOR Flash (128MB)
92*4882a593Smuzhiyun			  2 0 0xf2030000 0x00010000	// NAND Flash (8GB)
93*4882a593Smuzhiyun			  3 0 0xf2400000 0x00080000	// MRAM (512KB)
94*4882a593Smuzhiyun			  4 0 0xf2000000 0x00010000	// BCSR
95*4882a593Smuzhiyun			  5 0 0xf2010000 0x00010000>;	// QUART
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		bcsr@4,0 {
98*4882a593Smuzhiyun			compatible = "artesyn,mvme7100-bcsr";
99*4882a593Smuzhiyun			reg = <4 0 0x10000>;
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun		serial@5,1000 {
103*4882a593Smuzhiyun			device_type = "serial";
104*4882a593Smuzhiyun			compatible = "ns16550";
105*4882a593Smuzhiyun			reg = <5 0x1000 0x100>;
106*4882a593Smuzhiyun			clock-frequency = <1843200>;
107*4882a593Smuzhiyun			interrupts = <11 1 0 0>;
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		serial@5,2000 {
111*4882a593Smuzhiyun			device_type = "serial";
112*4882a593Smuzhiyun			compatible = "ns16550";
113*4882a593Smuzhiyun			reg = <5 0x2000 0x100>;
114*4882a593Smuzhiyun			clock-frequency = <1843200>;
115*4882a593Smuzhiyun			interrupts = <11 1 0 0>;
116*4882a593Smuzhiyun		};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		serial@5,3000 {
119*4882a593Smuzhiyun			device_type = "serial";
120*4882a593Smuzhiyun			compatible = "ns16550";
121*4882a593Smuzhiyun			reg = <5 0x3000 0x100>;
122*4882a593Smuzhiyun			clock-frequency = <1843200>;
123*4882a593Smuzhiyun			interrupts = <11 1 0 0>;
124*4882a593Smuzhiyun		};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		serial@5,4000 {
127*4882a593Smuzhiyun			device_type = "serial";
128*4882a593Smuzhiyun			compatible = "ns16550";
129*4882a593Smuzhiyun			reg = <5 0x4000 0x100>;
130*4882a593Smuzhiyun			clock-frequency = <1843200>;
131*4882a593Smuzhiyun			interrupts = <11 1 0 0>;
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	pci0: pcie@f1008000 {
136*4882a593Smuzhiyun		status = "disabled";
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun	pci1: pcie@f1009000 {
140*4882a593Smuzhiyun		status = "disabled";
141*4882a593Smuzhiyun	};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun	chosen {
144*4882a593Smuzhiyun		stdout-path = &serial0;
145*4882a593Smuzhiyun	};
146*4882a593Smuzhiyun};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun/include/ "mpc8641si-post.dtsi"
149