1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * MPC8641 Silicon/SoC Device Tree Source (pre include) 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun #address-cells = <1>; 12*4882a593Smuzhiyun #size-cells = <1>; 13*4882a593Smuzhiyun interrupt-parent = <&mpic>; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun aliases { 16*4882a593Smuzhiyun ethernet0 = &enet0; 17*4882a593Smuzhiyun ethernet1 = &enet1; 18*4882a593Smuzhiyun ethernet2 = &enet2; 19*4882a593Smuzhiyun ethernet3 = &enet3; 20*4882a593Smuzhiyun serial0 = &serial0; 21*4882a593Smuzhiyun serial1 = &serial1; 22*4882a593Smuzhiyun pci0 = &pci0; 23*4882a593Smuzhiyun pci1 = &pci1; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun cpus { 27*4882a593Smuzhiyun #address-cells = <1>; 28*4882a593Smuzhiyun #size-cells = <0>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun PowerPC,8641@0 { 31*4882a593Smuzhiyun device_type = "cpu"; 32*4882a593Smuzhiyun reg = <0>; 33*4882a593Smuzhiyun d-cache-line-size = <32>; 34*4882a593Smuzhiyun i-cache-line-size = <32>; 35*4882a593Smuzhiyun d-cache-size = <32768>; 36*4882a593Smuzhiyun i-cache-size = <32768>; 37*4882a593Smuzhiyun timebase-frequency = <0>; 38*4882a593Smuzhiyun bus-frequency = <0>; 39*4882a593Smuzhiyun clock-frequency = <0>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun PowerPC,8641@1 { 43*4882a593Smuzhiyun device_type = "cpu"; 44*4882a593Smuzhiyun reg = <1>; 45*4882a593Smuzhiyun d-cache-line-size = <32>; 46*4882a593Smuzhiyun i-cache-line-size = <32>; 47*4882a593Smuzhiyun d-cache-size = <32768>; 48*4882a593Smuzhiyun i-cache-size = <32768>; 49*4882a593Smuzhiyun timebase-frequency = <0>; 50*4882a593Smuzhiyun bus-frequency = <0>; 51*4882a593Smuzhiyun clock-frequency = <0>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun}; 55