1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * MPC8536DS Device Tree Source (36-bit address map) 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2008-2009, 2011 Freescale Semiconductor, Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/include/ "mpc8536si-pre.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "fsl,mpc8536ds"; 12*4882a593Smuzhiyun compatible = "fsl,mpc8536ds"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun cpus { 15*4882a593Smuzhiyun #cpus = <1>; 16*4882a593Smuzhiyun #address-cells = <1>; 17*4882a593Smuzhiyun #size-cells = <0>; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun PowerPC,8536@0 { 20*4882a593Smuzhiyun device_type = "cpu"; 21*4882a593Smuzhiyun reg = <0>; 22*4882a593Smuzhiyun next-level-cache = <&L2>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun memory { 27*4882a593Smuzhiyun device_type = "memory"; 28*4882a593Smuzhiyun reg = <0 0 0 0>; // Filled by U-Boot 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun lbc: localbus@fffe05000 { 32*4882a593Smuzhiyun reg = <0xf 0xffe05000 0 0x1000>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 35*4882a593Smuzhiyun 0x2 0x0 0xf 0xffa00000 0x00040000 36*4882a593Smuzhiyun 0x3 0x0 0xf 0xffdf0000 0x00008000>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun board_soc: soc: soc@fffe00000 { 40*4882a593Smuzhiyun ranges = <0x0 0xf 0xffe00000 0x100000>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun pci0: pci@fffe08000 { 44*4882a593Smuzhiyun reg = <0xf 0xffe08000 0 0x1000>; 45*4882a593Smuzhiyun ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000 46*4882a593Smuzhiyun 0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>; 47*4882a593Smuzhiyun clock-frequency = <66666666>; 48*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 49*4882a593Smuzhiyun interrupt-map = < 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* IDSEL 0x11 J17 Slot 1 */ 52*4882a593Smuzhiyun 0x8800 0 0 1 &mpic 1 1 0 0 53*4882a593Smuzhiyun 0x8800 0 0 2 &mpic 2 1 0 0 54*4882a593Smuzhiyun 0x8800 0 0 3 &mpic 3 1 0 0 55*4882a593Smuzhiyun 0x8800 0 0 4 &mpic 4 1 0 0>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun pci1: pcie@fffe09000 { 59*4882a593Smuzhiyun reg = <0xf 0xffe09000 0 0x1000>; 60*4882a593Smuzhiyun ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000 61*4882a593Smuzhiyun 0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>; 62*4882a593Smuzhiyun pcie@0 { 63*4882a593Smuzhiyun ranges = <0x02000000 0 0xf8000000 64*4882a593Smuzhiyun 0x02000000 0 0xf8000000 65*4882a593Smuzhiyun 0 0x08000000 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun 0x01000000 0 0x00000000 68*4882a593Smuzhiyun 0x01000000 0 0x00000000 69*4882a593Smuzhiyun 0 0x00010000>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun pci2: pcie@fffe0a000 { 74*4882a593Smuzhiyun reg = <0xf 0xffe0a000 0 0x1000>; 75*4882a593Smuzhiyun ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000 76*4882a593Smuzhiyun 0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>; 77*4882a593Smuzhiyun pcie@0 { 78*4882a593Smuzhiyun ranges = <0x02000000 0 0xf8000000 79*4882a593Smuzhiyun 0x02000000 0 0xf8000000 80*4882a593Smuzhiyun 0 0x08000000 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun 0x01000000 0 0x00000000 83*4882a593Smuzhiyun 0x01000000 0 0x00000000 84*4882a593Smuzhiyun 0 0x00010000>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun pci3: pcie@fffe0b000 { 89*4882a593Smuzhiyun reg = <0xf 0xffe0b000 0 0x1000>; 90*4882a593Smuzhiyun ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000 91*4882a593Smuzhiyun 0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>; 92*4882a593Smuzhiyun pcie@0 { 93*4882a593Smuzhiyun ranges = <0x02000000 0 0xe0000000 94*4882a593Smuzhiyun 0x02000000 0 0xe0000000 95*4882a593Smuzhiyun 0 0x20000000 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun 0x01000000 0 0x00000000 98*4882a593Smuzhiyun 0x01000000 0 0x00000000 99*4882a593Smuzhiyun 0 0x00100000>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun}; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun/include/ "mpc8536si-post.dtsi" 105*4882a593Smuzhiyun/include/ "mpc8536ds.dtsi" 106