xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/gef_sbc610.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * GE SBC610 Device Tree Source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on: SBS CM6 Device Tree Source
8*4882a593Smuzhiyun * Copyright 2007 SBS Technologies GmbH & Co. KG
9*4882a593Smuzhiyun * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
10*4882a593Smuzhiyun * Copyright 2006 Freescale Semiconductor Inc.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/*
14*4882a593Smuzhiyun * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun/include/ "mpc8641si-pre.dtsi"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun/ {
20*4882a593Smuzhiyun	model = "GEF_SBC610";
21*4882a593Smuzhiyun	compatible = "gef,sbc610";
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	memory {
24*4882a593Smuzhiyun		device_type = "memory";
25*4882a593Smuzhiyun		reg = <0x0 0x40000000>;	// set by uboot
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	lbc: localbus@fef05000 {
29*4882a593Smuzhiyun		reg = <0xfef05000 0x1000>;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		ranges = <0 0 0xff000000 0x01000000	// 16MB Boot flash
32*4882a593Smuzhiyun			  1 0 0xe8000000 0x08000000	// Paged Flash 0
33*4882a593Smuzhiyun			  2 0 0xe0000000 0x08000000	// Paged Flash 1
34*4882a593Smuzhiyun			  3 0 0xfc100000 0x00020000	// NVRAM
35*4882a593Smuzhiyun			  4 0 0xfc000000 0x00008000	// FPGA
36*4882a593Smuzhiyun			  5 0 0xfc008000 0x00008000	// AFIX FPGA
37*4882a593Smuzhiyun			  6 0 0xfd000000 0x00800000	// IO FPGA (8-bit)
38*4882a593Smuzhiyun			  7 0 0xfd800000 0x00800000>;	// IO FPGA (32-bit)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		/* flash@0,0 is a mirror of part of the memory in flash@1,0
41*4882a593Smuzhiyun		flash@0,0 {
42*4882a593Smuzhiyun			compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
43*4882a593Smuzhiyun			reg = <0x0 0x0 0x1000000>;
44*4882a593Smuzhiyun			bank-width = <4>;
45*4882a593Smuzhiyun			device-width = <2>;
46*4882a593Smuzhiyun			#address-cells = <1>;
47*4882a593Smuzhiyun			#size-cells = <1>;
48*4882a593Smuzhiyun			partition@0 {
49*4882a593Smuzhiyun				label = "firmware";
50*4882a593Smuzhiyun				reg = <0x0 0x1000000>;
51*4882a593Smuzhiyun				read-only;
52*4882a593Smuzhiyun			};
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun		*/
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		flash@1,0 {
57*4882a593Smuzhiyun			compatible = "gef,sbc610-paged-flash", "cfi-flash";
58*4882a593Smuzhiyun			reg = <0x1 0x0 0x8000000>;
59*4882a593Smuzhiyun			bank-width = <4>;
60*4882a593Smuzhiyun			device-width = <2>;
61*4882a593Smuzhiyun			#address-cells = <1>;
62*4882a593Smuzhiyun			#size-cells = <1>;
63*4882a593Smuzhiyun			partition@0 {
64*4882a593Smuzhiyun				label = "user";
65*4882a593Smuzhiyun				reg = <0x0 0x7800000>;
66*4882a593Smuzhiyun			};
67*4882a593Smuzhiyun			partition@7800000 {
68*4882a593Smuzhiyun				label = "firmware";
69*4882a593Smuzhiyun				reg = <0x7800000 0x800000>;
70*4882a593Smuzhiyun				read-only;
71*4882a593Smuzhiyun			};
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		nvram@3,0 {
75*4882a593Smuzhiyun			device_type = "nvram";
76*4882a593Smuzhiyun			compatible = "simtek,stk14ca8";
77*4882a593Smuzhiyun			reg = <0x3 0x0 0x20000>;
78*4882a593Smuzhiyun		};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun		fpga@4,0 {
81*4882a593Smuzhiyun			compatible = "gef,fpga-regs";
82*4882a593Smuzhiyun			reg = <0x4 0x0 0x40>;
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun		wdt@4,2000 {
86*4882a593Smuzhiyun			compatible = "gef,fpga-wdt";
87*4882a593Smuzhiyun			reg = <0x4 0x2000 0x8>;
88*4882a593Smuzhiyun			interrupts = <0x1a 0x4>;
89*4882a593Smuzhiyun			interrupt-parent = <&gef_pic>;
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun		/* Second watchdog available, driver currently supports one.
92*4882a593Smuzhiyun		wdt@4,2010 {
93*4882a593Smuzhiyun			compatible = "gef,fpga-wdt";
94*4882a593Smuzhiyun			reg = <0x4 0x2010 0x8>;
95*4882a593Smuzhiyun			interrupts = <0x1b 0x4>;
96*4882a593Smuzhiyun			interrupt-parent = <&gef_pic>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun		*/
99*4882a593Smuzhiyun		gef_pic: pic@4,4000 {
100*4882a593Smuzhiyun			#interrupt-cells = <1>;
101*4882a593Smuzhiyun			interrupt-controller;
102*4882a593Smuzhiyun			compatible = "gef,fpga-pic";
103*4882a593Smuzhiyun			reg = <0x4 0x4000 0x20>;
104*4882a593Smuzhiyun			interrupts = <0x8 0x9 0 0>;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun		};
107*4882a593Smuzhiyun		gef_gpio: gpio@7,14000 {
108*4882a593Smuzhiyun			#gpio-cells = <2>;
109*4882a593Smuzhiyun			compatible = "gef,sbc610-gpio";
110*4882a593Smuzhiyun			reg = <0x7 0x14000 0x24>;
111*4882a593Smuzhiyun			gpio-controller;
112*4882a593Smuzhiyun		};
113*4882a593Smuzhiyun	};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun	soc: soc@fef00000 {
116*4882a593Smuzhiyun		ranges = <0x0 0xfef00000 0x00100000>;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun		i2c@3000 {
119*4882a593Smuzhiyun			hwmon@48 {
120*4882a593Smuzhiyun				compatible = "national,lm92";
121*4882a593Smuzhiyun				reg = <0x48>;
122*4882a593Smuzhiyun			};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun			hwmon@4c {
125*4882a593Smuzhiyun				compatible = "adi,adt7461";
126*4882a593Smuzhiyun				reg = <0x4c>;
127*4882a593Smuzhiyun			};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun			rtc@51 {
130*4882a593Smuzhiyun				compatible = "epson,rx8581";
131*4882a593Smuzhiyun				reg = <0x00000051>;
132*4882a593Smuzhiyun			};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun			eti@6b {
135*4882a593Smuzhiyun				compatible = "dallas,ds1682";
136*4882a593Smuzhiyun				reg = <0x6b>;
137*4882a593Smuzhiyun			};
138*4882a593Smuzhiyun		};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		enet0: ethernet@24000 {
141*4882a593Smuzhiyun			tbi-handle = <&tbi0>;
142*4882a593Smuzhiyun			phy-handle = <&phy0>;
143*4882a593Smuzhiyun			phy-connection-type = "gmii";
144*4882a593Smuzhiyun		};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun		mdio@24520 {
147*4882a593Smuzhiyun			phy0: ethernet-phy@0 {
148*4882a593Smuzhiyun				interrupt-parent = <&gef_pic>;
149*4882a593Smuzhiyun				interrupts = <0x9 0x4>;
150*4882a593Smuzhiyun				reg = <1>;
151*4882a593Smuzhiyun			};
152*4882a593Smuzhiyun			phy2: ethernet-phy@2 {
153*4882a593Smuzhiyun				interrupt-parent = <&gef_pic>;
154*4882a593Smuzhiyun				interrupts = <0x8 0x4>;
155*4882a593Smuzhiyun				reg = <3>;
156*4882a593Smuzhiyun			};
157*4882a593Smuzhiyun			tbi0: tbi-phy@11 {
158*4882a593Smuzhiyun				reg = <0x11>;
159*4882a593Smuzhiyun				device_type = "tbi-phy";
160*4882a593Smuzhiyun			};
161*4882a593Smuzhiyun		};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		enet1: ethernet@26000 {
164*4882a593Smuzhiyun			tbi-handle = <&tbi2>;
165*4882a593Smuzhiyun			phy-handle = <&phy2>;
166*4882a593Smuzhiyun			phy-connection-type = "gmii";
167*4882a593Smuzhiyun		};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun		mdio@26520 {
170*4882a593Smuzhiyun			tbi2: tbi-phy@11 {
171*4882a593Smuzhiyun				reg = <0x11>;
172*4882a593Smuzhiyun				device_type = "tbi-phy";
173*4882a593Smuzhiyun			};
174*4882a593Smuzhiyun		};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		enet2: ethernet@25000 {
177*4882a593Smuzhiyun			status = "disabled";
178*4882a593Smuzhiyun		};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun		mdio@25520 {
181*4882a593Smuzhiyun			status = "disabled";
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun		enet3: ethernet@27000 {
185*4882a593Smuzhiyun			status = "disabled";
186*4882a593Smuzhiyun		};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun		mdio@27520 {
189*4882a593Smuzhiyun			status = "disabled";
190*4882a593Smuzhiyun		};
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun	pci0: pcie@fef08000 {
194*4882a593Smuzhiyun		reg = <0xfef08000 0x1000>;
195*4882a593Smuzhiyun		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
196*4882a593Smuzhiyun			  0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun		pcie@0 {
199*4882a593Smuzhiyun			ranges = <0x02000000 0x0 0x80000000
200*4882a593Smuzhiyun				  0x02000000 0x0 0x80000000
201*4882a593Smuzhiyun				  0x0 0x40000000
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun				  0x01000000 0x0 0x00000000
204*4882a593Smuzhiyun				  0x01000000 0x0 0x00000000
205*4882a593Smuzhiyun				  0x0 0x00400000>;
206*4882a593Smuzhiyun		};
207*4882a593Smuzhiyun	};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun	pci1: pcie@fef09000 {
210*4882a593Smuzhiyun		status = "disabled";
211*4882a593Smuzhiyun	};
212*4882a593Smuzhiyun};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun/include/ "mpc8641si-post.dtsi"
215