xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/ebony.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree Source for IBM Ebony
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 2006, 2007 IBM Corp.
5*4882a593Smuzhiyun * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * FIXME: Draft only!
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
10*4882a593Smuzhiyun * License version 2.  This program is licensed "as is" without
11*4882a593Smuzhiyun * any warranty of any kind, whether express or implied.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/dts-v1/;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun/ {
17*4882a593Smuzhiyun	#address-cells = <2>;
18*4882a593Smuzhiyun	#size-cells = <1>;
19*4882a593Smuzhiyun	model = "ibm,ebony";
20*4882a593Smuzhiyun	compatible = "ibm,ebony";
21*4882a593Smuzhiyun	dcr-parent = <&{/cpus/cpu@0}>;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	aliases {
24*4882a593Smuzhiyun		ethernet0 = &EMAC0;
25*4882a593Smuzhiyun		ethernet1 = &EMAC1;
26*4882a593Smuzhiyun		serial0 = &UART0;
27*4882a593Smuzhiyun		serial1 = &UART1;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	cpus {
31*4882a593Smuzhiyun		#address-cells = <1>;
32*4882a593Smuzhiyun		#size-cells = <0>;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		cpu@0 {
35*4882a593Smuzhiyun			device_type = "cpu";
36*4882a593Smuzhiyun			model = "PowerPC,440GP";
37*4882a593Smuzhiyun			reg = <0x00000000>;
38*4882a593Smuzhiyun			clock-frequency = <0>; // Filled in by zImage
39*4882a593Smuzhiyun			timebase-frequency = <0>; // Filled in by zImage
40*4882a593Smuzhiyun			i-cache-line-size = <32>;
41*4882a593Smuzhiyun			d-cache-line-size = <32>;
42*4882a593Smuzhiyun			i-cache-size = <32768>; /* 32 kB */
43*4882a593Smuzhiyun			d-cache-size = <32768>; /* 32 kB */
44*4882a593Smuzhiyun			dcr-controller;
45*4882a593Smuzhiyun			dcr-access-method = "native";
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	memory {
50*4882a593Smuzhiyun		device_type = "memory";
51*4882a593Smuzhiyun		reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	UIC0: interrupt-controller0 {
55*4882a593Smuzhiyun		compatible = "ibm,uic-440gp", "ibm,uic";
56*4882a593Smuzhiyun		interrupt-controller;
57*4882a593Smuzhiyun		cell-index = <0>;
58*4882a593Smuzhiyun		dcr-reg = <0x0c0 0x009>;
59*4882a593Smuzhiyun		#address-cells = <0>;
60*4882a593Smuzhiyun		#size-cells = <0>;
61*4882a593Smuzhiyun		#interrupt-cells = <2>;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	UIC1: interrupt-controller1 {
66*4882a593Smuzhiyun		compatible = "ibm,uic-440gp", "ibm,uic";
67*4882a593Smuzhiyun		interrupt-controller;
68*4882a593Smuzhiyun		cell-index = <1>;
69*4882a593Smuzhiyun		dcr-reg = <0x0d0 0x009>;
70*4882a593Smuzhiyun		#address-cells = <0>;
71*4882a593Smuzhiyun		#size-cells = <0>;
72*4882a593Smuzhiyun		#interrupt-cells = <2>;
73*4882a593Smuzhiyun		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
74*4882a593Smuzhiyun		interrupt-parent = <&UIC0>;
75*4882a593Smuzhiyun	};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun	CPC0: cpc {
78*4882a593Smuzhiyun		compatible = "ibm,cpc-440gp";
79*4882a593Smuzhiyun		dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
80*4882a593Smuzhiyun		// FIXME: anything else?
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	plb {
84*4882a593Smuzhiyun		compatible = "ibm,plb-440gp", "ibm,plb4";
85*4882a593Smuzhiyun		#address-cells = <2>;
86*4882a593Smuzhiyun		#size-cells = <1>;
87*4882a593Smuzhiyun		ranges;
88*4882a593Smuzhiyun		clock-frequency = <0>; // Filled in by zImage
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun		SDRAM0: memory-controller {
91*4882a593Smuzhiyun			compatible = "ibm,sdram-440gp";
92*4882a593Smuzhiyun			dcr-reg = <0x010 0x002>;
93*4882a593Smuzhiyun			// FIXME: anything else?
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun		SRAM0: sram {
97*4882a593Smuzhiyun			compatible = "ibm,sram-440gp";
98*4882a593Smuzhiyun			dcr-reg = <0x020 0x008 0x00a 0x001>;
99*4882a593Smuzhiyun		};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun		DMA0: dma {
102*4882a593Smuzhiyun			// FIXME: ???
103*4882a593Smuzhiyun			compatible = "ibm,dma-440gp";
104*4882a593Smuzhiyun			dcr-reg = <0x100 0x027>;
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun		MAL0: mcmal {
108*4882a593Smuzhiyun			compatible = "ibm,mcmal-440gp", "ibm,mcmal";
109*4882a593Smuzhiyun			dcr-reg = <0x180 0x062>;
110*4882a593Smuzhiyun			num-tx-chans = <4>;
111*4882a593Smuzhiyun			num-rx-chans = <4>;
112*4882a593Smuzhiyun			interrupt-parent = <&MAL0>;
113*4882a593Smuzhiyun			interrupts = <0x0 0x1 0x2 0x3 0x4>;
114*4882a593Smuzhiyun			#interrupt-cells = <1>;
115*4882a593Smuzhiyun			#address-cells = <0>;
116*4882a593Smuzhiyun			#size-cells = <0>;
117*4882a593Smuzhiyun			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
118*4882a593Smuzhiyun					 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
119*4882a593Smuzhiyun					 /*SERR*/  0x2 &UIC1 0x0 0x4
120*4882a593Smuzhiyun					 /*TXDE*/  0x3 &UIC1 0x1 0x4
121*4882a593Smuzhiyun					 /*RXDE*/  0x4 &UIC1 0x2 0x4>;
122*4882a593Smuzhiyun			interrupt-map-mask = <0xffffffff>;
123*4882a593Smuzhiyun		};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun		POB0: opb {
126*4882a593Smuzhiyun			compatible = "ibm,opb-440gp", "ibm,opb";
127*4882a593Smuzhiyun			#address-cells = <1>;
128*4882a593Smuzhiyun			#size-cells = <1>;
129*4882a593Smuzhiyun			/* Wish there was a nicer way of specifying a full 32-bit
130*4882a593Smuzhiyun			   range */
131*4882a593Smuzhiyun			ranges = <0x00000000 0x00000001 0x00000000 0x80000000
132*4882a593Smuzhiyun				  0x80000000 0x00000001 0x80000000 0x80000000>;
133*4882a593Smuzhiyun			dcr-reg = <0x090 0x00b>;
134*4882a593Smuzhiyun			interrupt-parent = <&UIC1>;
135*4882a593Smuzhiyun			interrupts = <0x7 0x4>;
136*4882a593Smuzhiyun			clock-frequency = <0>; // Filled in by zImage
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun			EBC0: ebc {
139*4882a593Smuzhiyun				compatible = "ibm,ebc-440gp", "ibm,ebc";
140*4882a593Smuzhiyun				dcr-reg = <0x012 0x002>;
141*4882a593Smuzhiyun				#address-cells = <2>;
142*4882a593Smuzhiyun				#size-cells = <1>;
143*4882a593Smuzhiyun				clock-frequency = <0>; // Filled in by zImage
144*4882a593Smuzhiyun				// ranges property is supplied by zImage
145*4882a593Smuzhiyun				// based on firmware's configuration of the
146*4882a593Smuzhiyun				// EBC bridge
147*4882a593Smuzhiyun				interrupts = <0x5 0x4>;
148*4882a593Smuzhiyun				interrupt-parent = <&UIC1>;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun				small-flash@0,80000 {
151*4882a593Smuzhiyun					compatible = "jedec-flash";
152*4882a593Smuzhiyun					bank-width = <1>;
153*4882a593Smuzhiyun					reg = <0x00000000 0x00080000 0x00080000>;
154*4882a593Smuzhiyun					#address-cells = <1>;
155*4882a593Smuzhiyun					#size-cells = <1>;
156*4882a593Smuzhiyun					partition@0 {
157*4882a593Smuzhiyun						label = "OpenBIOS";
158*4882a593Smuzhiyun						reg = <0x00000000 0x00080000>;
159*4882a593Smuzhiyun						read-only;
160*4882a593Smuzhiyun					};
161*4882a593Smuzhiyun				};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun				nvram@1,0 {
164*4882a593Smuzhiyun					/* NVRAM & RTC */
165*4882a593Smuzhiyun					compatible = "ds1743-nvram";
166*4882a593Smuzhiyun					#bytes = <0x2000>;
167*4882a593Smuzhiyun					reg = <0x00000001 0x00000000 0x00002000>;
168*4882a593Smuzhiyun				};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun				large-flash@2,0 {
171*4882a593Smuzhiyun					compatible = "jedec-flash";
172*4882a593Smuzhiyun					bank-width = <1>;
173*4882a593Smuzhiyun					reg = <0x00000002 0x00000000 0x00400000>;
174*4882a593Smuzhiyun					#address-cells = <1>;
175*4882a593Smuzhiyun					#size-cells = <1>;
176*4882a593Smuzhiyun					partition@0 {
177*4882a593Smuzhiyun						label = "fs";
178*4882a593Smuzhiyun						reg = <0x00000000 0x00380000>;
179*4882a593Smuzhiyun					};
180*4882a593Smuzhiyun					partition@380000 {
181*4882a593Smuzhiyun						label = "firmware";
182*4882a593Smuzhiyun						reg = <0x00380000 0x00080000>;
183*4882a593Smuzhiyun					};
184*4882a593Smuzhiyun				};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun				ir@3,0 {
187*4882a593Smuzhiyun					reg = <0x00000003 0x00000000 0x00000010>;
188*4882a593Smuzhiyun				};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun				fpga@7,0 {
191*4882a593Smuzhiyun					compatible = "Ebony-FPGA";
192*4882a593Smuzhiyun					reg = <0x00000007 0x00000000 0x00000010>;
193*4882a593Smuzhiyun					virtual-reg = <0xe8300000>;
194*4882a593Smuzhiyun				};
195*4882a593Smuzhiyun			};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun			UART0: serial@40000200 {
198*4882a593Smuzhiyun				device_type = "serial";
199*4882a593Smuzhiyun				compatible = "ns16550";
200*4882a593Smuzhiyun				reg = <0x40000200 0x00000008>;
201*4882a593Smuzhiyun				virtual-reg = <0xe0000200>;
202*4882a593Smuzhiyun				clock-frequency = <11059200>;
203*4882a593Smuzhiyun				current-speed = <9600>;
204*4882a593Smuzhiyun				interrupt-parent = <&UIC0>;
205*4882a593Smuzhiyun				interrupts = <0x0 0x4>;
206*4882a593Smuzhiyun			};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun			UART1: serial@40000300 {
209*4882a593Smuzhiyun				device_type = "serial";
210*4882a593Smuzhiyun				compatible = "ns16550";
211*4882a593Smuzhiyun				reg = <0x40000300 0x00000008>;
212*4882a593Smuzhiyun				virtual-reg = <0xe0000300>;
213*4882a593Smuzhiyun				clock-frequency = <11059200>;
214*4882a593Smuzhiyun				current-speed = <9600>;
215*4882a593Smuzhiyun				interrupt-parent = <&UIC0>;
216*4882a593Smuzhiyun				interrupts = <0x1 0x4>;
217*4882a593Smuzhiyun			};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun			IIC0: i2c@40000400 {
220*4882a593Smuzhiyun				/* FIXME */
221*4882a593Smuzhiyun				compatible = "ibm,iic-440gp", "ibm,iic";
222*4882a593Smuzhiyun				reg = <0x40000400 0x00000014>;
223*4882a593Smuzhiyun				interrupt-parent = <&UIC0>;
224*4882a593Smuzhiyun				interrupts = <0x2 0x4>;
225*4882a593Smuzhiyun			};
226*4882a593Smuzhiyun			IIC1: i2c@40000500 {
227*4882a593Smuzhiyun				/* FIXME */
228*4882a593Smuzhiyun				compatible = "ibm,iic-440gp", "ibm,iic";
229*4882a593Smuzhiyun				reg = <0x40000500 0x00000014>;
230*4882a593Smuzhiyun				interrupt-parent = <&UIC0>;
231*4882a593Smuzhiyun				interrupts = <0x3 0x4>;
232*4882a593Smuzhiyun			};
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun			GPIO0: gpio@40000700 {
235*4882a593Smuzhiyun				/* FIXME */
236*4882a593Smuzhiyun				compatible = "ibm,gpio-440gp";
237*4882a593Smuzhiyun				reg = <0x40000700 0x00000020>;
238*4882a593Smuzhiyun			};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun			ZMII0: emac-zmii@40000780 {
241*4882a593Smuzhiyun				compatible = "ibm,zmii-440gp", "ibm,zmii";
242*4882a593Smuzhiyun				reg = <0x40000780 0x0000000c>;
243*4882a593Smuzhiyun			};
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun			EMAC0: ethernet@40000800 {
246*4882a593Smuzhiyun				device_type = "network";
247*4882a593Smuzhiyun				compatible = "ibm,emac-440gp", "ibm,emac";
248*4882a593Smuzhiyun				interrupt-parent = <&UIC1>;
249*4882a593Smuzhiyun				interrupts = <0x1c 0x4 0x1d 0x4>;
250*4882a593Smuzhiyun				reg = <0x40000800 0x00000070>;
251*4882a593Smuzhiyun				local-mac-address = [000000000000]; // Filled in by zImage
252*4882a593Smuzhiyun				mal-device = <&MAL0>;
253*4882a593Smuzhiyun				mal-tx-channel = <0 1>;
254*4882a593Smuzhiyun				mal-rx-channel = <0>;
255*4882a593Smuzhiyun				cell-index = <0>;
256*4882a593Smuzhiyun				max-frame-size = <1500>;
257*4882a593Smuzhiyun				rx-fifo-size = <4096>;
258*4882a593Smuzhiyun				tx-fifo-size = <2048>;
259*4882a593Smuzhiyun				phy-mode = "rmii";
260*4882a593Smuzhiyun				phy-map = <0x00000001>;
261*4882a593Smuzhiyun				zmii-device = <&ZMII0>;
262*4882a593Smuzhiyun				zmii-channel = <0>;
263*4882a593Smuzhiyun			};
264*4882a593Smuzhiyun			EMAC1: ethernet@40000900 {
265*4882a593Smuzhiyun				device_type = "network";
266*4882a593Smuzhiyun				compatible = "ibm,emac-440gp", "ibm,emac";
267*4882a593Smuzhiyun				interrupt-parent = <&UIC1>;
268*4882a593Smuzhiyun				interrupts = <0x1e 0x4 0x1f 0x4>;
269*4882a593Smuzhiyun				reg = <0x40000900 0x00000070>;
270*4882a593Smuzhiyun				local-mac-address = [000000000000]; // Filled in by zImage
271*4882a593Smuzhiyun				mal-device = <&MAL0>;
272*4882a593Smuzhiyun				mal-tx-channel = <2 3>;
273*4882a593Smuzhiyun				mal-rx-channel = <1>;
274*4882a593Smuzhiyun				cell-index = <1>;
275*4882a593Smuzhiyun				max-frame-size = <1500>;
276*4882a593Smuzhiyun				rx-fifo-size = <4096>;
277*4882a593Smuzhiyun				tx-fifo-size = <2048>;
278*4882a593Smuzhiyun				phy-mode = "rmii";
279*4882a593Smuzhiyun				phy-map = <0x00000001>;
280*4882a593Smuzhiyun				zmii-device = <&ZMII0>;
281*4882a593Smuzhiyun				zmii-channel = <1>;
282*4882a593Smuzhiyun			};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun			GPT0: gpt@40000a00 {
286*4882a593Smuzhiyun				/* FIXME */
287*4882a593Smuzhiyun				reg = <0x40000a00 0x000000d4>;
288*4882a593Smuzhiyun				interrupt-parent = <&UIC0>;
289*4882a593Smuzhiyun				interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
290*4882a593Smuzhiyun			};
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun		};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun		PCIX0: pci@20ec00000 {
295*4882a593Smuzhiyun			device_type = "pci";
296*4882a593Smuzhiyun			#interrupt-cells = <1>;
297*4882a593Smuzhiyun			#size-cells = <2>;
298*4882a593Smuzhiyun			#address-cells = <3>;
299*4882a593Smuzhiyun			compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
300*4882a593Smuzhiyun			primary;
301*4882a593Smuzhiyun			reg = <0x00000002 0x0ec00000 0x00000008	/* Config space access */
302*4882a593Smuzhiyun			       0x00000000 0x00000000 0x00000000		/* no IACK cycles */
303*4882a593Smuzhiyun			       0x00000002 0x0ed00000 0x00000004     /* Special cycles */
304*4882a593Smuzhiyun			       0x00000002 0x0ec80000 0x000000f0	/* Internal registers */
305*4882a593Smuzhiyun			       0x00000002 0x0ec80100 0x000000fc>;	/* Internal messaging registers */
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun			/* Outbound ranges, one memory and one IO,
308*4882a593Smuzhiyun			 * later cannot be changed
309*4882a593Smuzhiyun			 */
310*4882a593Smuzhiyun			ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
311*4882a593Smuzhiyun				  0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun			/* Inbound 2GB range starting at 0 */
314*4882a593Smuzhiyun			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun			/* Ebony has all 4 IRQ pins tied together per slot */
317*4882a593Smuzhiyun			interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
318*4882a593Smuzhiyun			interrupt-map = <
319*4882a593Smuzhiyun				/* IDSEL 1 */
320*4882a593Smuzhiyun				0x800 0x0 0x0 0x0 &UIC0 0x17 0x8
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun				/* IDSEL 2 */
323*4882a593Smuzhiyun				0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun				/* IDSEL 3 */
326*4882a593Smuzhiyun				0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun				/* IDSEL 4 */
329*4882a593Smuzhiyun				0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8
330*4882a593Smuzhiyun			>;
331*4882a593Smuzhiyun		};
332*4882a593Smuzhiyun	};
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun	chosen {
335*4882a593Smuzhiyun		stdout-path = "/plb/opb/serial@40000200";
336*4882a593Smuzhiyun	};
337*4882a593Smuzhiyun};
338