1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Source for AMCC Bamboo 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2006, 2007 IBM Corp. 5*4882a593Smuzhiyun * Josh Boyer <jwboyer@linux.vnet.ibm.com> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * FIXME: Draft only! 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 10*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without 11*4882a593Smuzhiyun * any warranty of any kind, whether express or implied. 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/dts-v1/; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/ { 17*4882a593Smuzhiyun #address-cells = <2>; 18*4882a593Smuzhiyun #size-cells = <1>; 19*4882a593Smuzhiyun model = "amcc,bamboo"; 20*4882a593Smuzhiyun compatible = "amcc,bamboo"; 21*4882a593Smuzhiyun dcr-parent = <&{/cpus/cpu@0}>; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun aliases { 24*4882a593Smuzhiyun ethernet0 = &EMAC0; 25*4882a593Smuzhiyun ethernet1 = &EMAC1; 26*4882a593Smuzhiyun serial0 = &UART0; 27*4882a593Smuzhiyun serial1 = &UART1; 28*4882a593Smuzhiyun serial2 = &UART2; 29*4882a593Smuzhiyun serial3 = &UART3; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun cpus { 33*4882a593Smuzhiyun #address-cells = <1>; 34*4882a593Smuzhiyun #size-cells = <0>; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun cpu@0 { 37*4882a593Smuzhiyun device_type = "cpu"; 38*4882a593Smuzhiyun model = "PowerPC,440EP"; 39*4882a593Smuzhiyun reg = <0x00000000>; 40*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 41*4882a593Smuzhiyun timebase-frequency = <0>; /* Filled in by zImage */ 42*4882a593Smuzhiyun i-cache-line-size = <32>; 43*4882a593Smuzhiyun d-cache-line-size = <32>; 44*4882a593Smuzhiyun i-cache-size = <32768>; 45*4882a593Smuzhiyun d-cache-size = <32768>; 46*4882a593Smuzhiyun dcr-controller; 47*4882a593Smuzhiyun dcr-access-method = "native"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun memory { 52*4882a593Smuzhiyun device_type = "memory"; 53*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun UIC0: interrupt-controller0 { 57*4882a593Smuzhiyun compatible = "ibm,uic-440ep","ibm,uic"; 58*4882a593Smuzhiyun interrupt-controller; 59*4882a593Smuzhiyun cell-index = <0>; 60*4882a593Smuzhiyun dcr-reg = <0x0c0 0x009>; 61*4882a593Smuzhiyun #address-cells = <0>; 62*4882a593Smuzhiyun #size-cells = <0>; 63*4882a593Smuzhiyun #interrupt-cells = <2>; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun UIC1: interrupt-controller1 { 67*4882a593Smuzhiyun compatible = "ibm,uic-440ep","ibm,uic"; 68*4882a593Smuzhiyun interrupt-controller; 69*4882a593Smuzhiyun cell-index = <1>; 70*4882a593Smuzhiyun dcr-reg = <0x0d0 0x009>; 71*4882a593Smuzhiyun #address-cells = <0>; 72*4882a593Smuzhiyun #size-cells = <0>; 73*4882a593Smuzhiyun #interrupt-cells = <2>; 74*4882a593Smuzhiyun interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 75*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun SDR0: sdr { 79*4882a593Smuzhiyun compatible = "ibm,sdr-440ep"; 80*4882a593Smuzhiyun dcr-reg = <0x00e 0x002>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun CPR0: cpr { 84*4882a593Smuzhiyun compatible = "ibm,cpr-440ep"; 85*4882a593Smuzhiyun dcr-reg = <0x00c 0x002>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun plb { 89*4882a593Smuzhiyun compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 90*4882a593Smuzhiyun #address-cells = <2>; 91*4882a593Smuzhiyun #size-cells = <1>; 92*4882a593Smuzhiyun ranges; 93*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun SDRAM0: sdram { 96*4882a593Smuzhiyun compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 97*4882a593Smuzhiyun dcr-reg = <0x010 0x002>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun DMA0: dma { 101*4882a593Smuzhiyun compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 102*4882a593Smuzhiyun dcr-reg = <0x100 0x027>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun MAL0: mcmal { 106*4882a593Smuzhiyun compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 107*4882a593Smuzhiyun dcr-reg = <0x180 0x062>; 108*4882a593Smuzhiyun num-tx-chans = <4>; 109*4882a593Smuzhiyun num-rx-chans = <2>; 110*4882a593Smuzhiyun interrupt-parent = <&MAL0>; 111*4882a593Smuzhiyun interrupts = <0x0 0x1 0x2 0x3 0x4>; 112*4882a593Smuzhiyun #interrupt-cells = <1>; 113*4882a593Smuzhiyun #address-cells = <0>; 114*4882a593Smuzhiyun #size-cells = <0>; 115*4882a593Smuzhiyun interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 116*4882a593Smuzhiyun /*RXEOB*/ 0x1 &UIC0 0xb 0x4 117*4882a593Smuzhiyun /*SERR*/ 0x2 &UIC1 0x0 0x4 118*4882a593Smuzhiyun /*TXDE*/ 0x3 &UIC1 0x1 0x4 119*4882a593Smuzhiyun /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun POB0: opb { 123*4882a593Smuzhiyun compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 124*4882a593Smuzhiyun #address-cells = <1>; 125*4882a593Smuzhiyun #size-cells = <1>; 126*4882a593Smuzhiyun /* Bamboo is oddball in the 44x world and doesn't use the ERPN 127*4882a593Smuzhiyun * bits. 128*4882a593Smuzhiyun */ 129*4882a593Smuzhiyun ranges = <0x00000000 0x00000000 0x00000000 0x80000000 130*4882a593Smuzhiyun 0x80000000 0x00000000 0x80000000 0x80000000>; 131*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 132*4882a593Smuzhiyun interrupts = <0x7 0x4>; 133*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun EBC0: ebc { 136*4882a593Smuzhiyun compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 137*4882a593Smuzhiyun dcr-reg = <0x012 0x002>; 138*4882a593Smuzhiyun #address-cells = <2>; 139*4882a593Smuzhiyun #size-cells = <1>; 140*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 141*4882a593Smuzhiyun interrupts = <0x5 0x1>; 142*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun UART0: serial@ef600300 { 146*4882a593Smuzhiyun device_type = "serial"; 147*4882a593Smuzhiyun compatible = "ns16550"; 148*4882a593Smuzhiyun reg = <0xef600300 0x00000008>; 149*4882a593Smuzhiyun virtual-reg = <0xef600300>; 150*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by zImage */ 151*4882a593Smuzhiyun current-speed = <115200>; 152*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 153*4882a593Smuzhiyun interrupts = <0x0 0x4>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun UART1: serial@ef600400 { 157*4882a593Smuzhiyun device_type = "serial"; 158*4882a593Smuzhiyun compatible = "ns16550"; 159*4882a593Smuzhiyun reg = <0xef600400 0x00000008>; 160*4882a593Smuzhiyun virtual-reg = <0xef600400>; 161*4882a593Smuzhiyun clock-frequency = <0>; 162*4882a593Smuzhiyun current-speed = <0>; 163*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 164*4882a593Smuzhiyun interrupts = <0x1 0x4>; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun UART2: serial@ef600500 { 168*4882a593Smuzhiyun device_type = "serial"; 169*4882a593Smuzhiyun compatible = "ns16550"; 170*4882a593Smuzhiyun reg = <0xef600500 0x00000008>; 171*4882a593Smuzhiyun virtual-reg = <0xef600500>; 172*4882a593Smuzhiyun clock-frequency = <0>; 173*4882a593Smuzhiyun current-speed = <0>; 174*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 175*4882a593Smuzhiyun interrupts = <0x3 0x4>; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun UART3: serial@ef600600 { 179*4882a593Smuzhiyun device_type = "serial"; 180*4882a593Smuzhiyun compatible = "ns16550"; 181*4882a593Smuzhiyun reg = <0xef600600 0x00000008>; 182*4882a593Smuzhiyun virtual-reg = <0xef600600>; 183*4882a593Smuzhiyun clock-frequency = <0>; 184*4882a593Smuzhiyun current-speed = <0>; 185*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 186*4882a593Smuzhiyun interrupts = <0x4 0x4>; 187*4882a593Smuzhiyun }; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun IIC0: i2c@ef600700 { 190*4882a593Smuzhiyun compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 191*4882a593Smuzhiyun reg = <0xef600700 0x00000014>; 192*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 193*4882a593Smuzhiyun interrupts = <0x2 0x4>; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun IIC1: i2c@ef600800 { 197*4882a593Smuzhiyun compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 198*4882a593Smuzhiyun reg = <0xef600800 0x00000014>; 199*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 200*4882a593Smuzhiyun interrupts = <0x7 0x4>; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun ZMII0: emac-zmii@ef600d00 { 204*4882a593Smuzhiyun compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 205*4882a593Smuzhiyun reg = <0xef600d00 0x0000000c>; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun EMAC0: ethernet@ef600e00 { 209*4882a593Smuzhiyun device_type = "network"; 210*4882a593Smuzhiyun compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 211*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 212*4882a593Smuzhiyun interrupts = <0x1c 0x4 0x1d 0x4>; 213*4882a593Smuzhiyun reg = <0xef600e00 0x00000070>; 214*4882a593Smuzhiyun local-mac-address = [000000000000]; 215*4882a593Smuzhiyun mal-device = <&MAL0>; 216*4882a593Smuzhiyun mal-tx-channel = <0 1>; 217*4882a593Smuzhiyun mal-rx-channel = <0>; 218*4882a593Smuzhiyun cell-index = <0>; 219*4882a593Smuzhiyun max-frame-size = <1500>; 220*4882a593Smuzhiyun rx-fifo-size = <4096>; 221*4882a593Smuzhiyun tx-fifo-size = <2048>; 222*4882a593Smuzhiyun phy-mode = "rmii"; 223*4882a593Smuzhiyun phy-map = <0x00000000>; 224*4882a593Smuzhiyun zmii-device = <&ZMII0>; 225*4882a593Smuzhiyun zmii-channel = <0>; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun EMAC1: ethernet@ef600f00 { 229*4882a593Smuzhiyun device_type = "network"; 230*4882a593Smuzhiyun compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 231*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 232*4882a593Smuzhiyun interrupts = <0x1e 0x4 0x1f 0x4>; 233*4882a593Smuzhiyun reg = <0xef600f00 0x00000070>; 234*4882a593Smuzhiyun local-mac-address = [000000000000]; 235*4882a593Smuzhiyun mal-device = <&MAL0>; 236*4882a593Smuzhiyun mal-tx-channel = <2 3>; 237*4882a593Smuzhiyun mal-rx-channel = <1>; 238*4882a593Smuzhiyun cell-index = <1>; 239*4882a593Smuzhiyun max-frame-size = <1500>; 240*4882a593Smuzhiyun rx-fifo-size = <4096>; 241*4882a593Smuzhiyun tx-fifo-size = <2048>; 242*4882a593Smuzhiyun phy-mode = "rmii"; 243*4882a593Smuzhiyun phy-map = <0x00000000>; 244*4882a593Smuzhiyun zmii-device = <&ZMII0>; 245*4882a593Smuzhiyun zmii-channel = <1>; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun usb@ef601000 { 249*4882a593Smuzhiyun compatible = "ohci-be"; 250*4882a593Smuzhiyun reg = <0xef601000 0x00000080>; 251*4882a593Smuzhiyun interrupts = <0x8 0x1 0x9 0x1>; 252*4882a593Smuzhiyun interrupt-parent = < &UIC1 >; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun }; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun PCI0: pci@ec000000 { 257*4882a593Smuzhiyun device_type = "pci"; 258*4882a593Smuzhiyun #interrupt-cells = <1>; 259*4882a593Smuzhiyun #size-cells = <2>; 260*4882a593Smuzhiyun #address-cells = <3>; 261*4882a593Smuzhiyun compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; 262*4882a593Smuzhiyun primary; 263*4882a593Smuzhiyun reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ 264*4882a593Smuzhiyun 0x00000000 0xeed00000 0x00000004 /* IACK */ 265*4882a593Smuzhiyun 0x00000000 0xeed00000 0x00000004 /* Special cycle */ 266*4882a593Smuzhiyun 0x00000000 0xef400000 0x00000040>; /* Internal registers */ 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun /* Outbound ranges, one memory and one IO, 269*4882a593Smuzhiyun * later cannot be changed. Chip supports a second 270*4882a593Smuzhiyun * IO range but we don't use it for now 271*4882a593Smuzhiyun * The chip also supports a larger memory range but 272*4882a593Smuzhiyun * it's not naturally aligned, so our code will break 273*4882a593Smuzhiyun */ 274*4882a593Smuzhiyun ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 275*4882a593Smuzhiyun 0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000 276*4882a593Smuzhiyun 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun /* Inbound 2GB range starting at 0 */ 279*4882a593Smuzhiyun dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun /* Bamboo has all 4 IRQ pins tied together per slot */ 282*4882a593Smuzhiyun interrupt-map-mask = <0xf800 0x0 0x0 0x0>; 283*4882a593Smuzhiyun interrupt-map = < 284*4882a593Smuzhiyun /* IDSEL 1 */ 285*4882a593Smuzhiyun 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun /* IDSEL 2 */ 288*4882a593Smuzhiyun 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun /* IDSEL 3 */ 291*4882a593Smuzhiyun 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun /* IDSEL 4 */ 294*4882a593Smuzhiyun 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 295*4882a593Smuzhiyun >; 296*4882a593Smuzhiyun }; 297*4882a593Smuzhiyun }; 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun chosen { 300*4882a593Smuzhiyun stdout-path = "/plb/opb/serial@ef600300"; 301*4882a593Smuzhiyun }; 302*4882a593Smuzhiyun}; 303