1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for AMCC Arches (dual 460GT board) 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * (C) Copyright 2008 Applied Micro Circuits Corporation 6*4882a593Smuzhiyun * Victor Gallardo <vgallardo@amcc.com> 7*4882a593Smuzhiyun * Adam Graham <agraham@amcc.com> 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Based on the glacier.dts file 10*4882a593Smuzhiyun * Stefan Roese <sr@denx.de> 11*4882a593Smuzhiyun * Copyright 2008 DENX Software Engineering 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * See file CREDITS for list of people who contributed to this 14*4882a593Smuzhiyun * project. 15*4882a593Smuzhiyun */ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/dts-v1/; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun/ { 20*4882a593Smuzhiyun #address-cells = <2>; 21*4882a593Smuzhiyun #size-cells = <1>; 22*4882a593Smuzhiyun model = "amcc,arches"; 23*4882a593Smuzhiyun compatible = "amcc,arches"; 24*4882a593Smuzhiyun dcr-parent = <&{/cpus/cpu@0}>; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun aliases { 27*4882a593Smuzhiyun ethernet0 = &EMAC0; 28*4882a593Smuzhiyun ethernet1 = &EMAC1; 29*4882a593Smuzhiyun ethernet2 = &EMAC2; 30*4882a593Smuzhiyun serial0 = &UART0; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun cpus { 34*4882a593Smuzhiyun #address-cells = <1>; 35*4882a593Smuzhiyun #size-cells = <0>; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun cpu@0 { 38*4882a593Smuzhiyun device_type = "cpu"; 39*4882a593Smuzhiyun model = "PowerPC,460GT"; 40*4882a593Smuzhiyun reg = <0x00000000>; 41*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 42*4882a593Smuzhiyun timebase-frequency = <0>; /* Filled in by U-Boot */ 43*4882a593Smuzhiyun i-cache-line-size = <32>; 44*4882a593Smuzhiyun d-cache-line-size = <32>; 45*4882a593Smuzhiyun i-cache-size = <32768>; 46*4882a593Smuzhiyun d-cache-size = <32768>; 47*4882a593Smuzhiyun dcr-controller; 48*4882a593Smuzhiyun dcr-access-method = "native"; 49*4882a593Smuzhiyun next-level-cache = <&L2C0>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun memory { 54*4882a593Smuzhiyun device_type = "memory"; 55*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun UIC0: interrupt-controller0 { 59*4882a593Smuzhiyun compatible = "ibm,uic-460gt","ibm,uic"; 60*4882a593Smuzhiyun interrupt-controller; 61*4882a593Smuzhiyun cell-index = <0>; 62*4882a593Smuzhiyun dcr-reg = <0x0c0 0x009>; 63*4882a593Smuzhiyun #address-cells = <0>; 64*4882a593Smuzhiyun #size-cells = <0>; 65*4882a593Smuzhiyun #interrupt-cells = <2>; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun UIC1: interrupt-controller1 { 69*4882a593Smuzhiyun compatible = "ibm,uic-460gt","ibm,uic"; 70*4882a593Smuzhiyun interrupt-controller; 71*4882a593Smuzhiyun cell-index = <1>; 72*4882a593Smuzhiyun dcr-reg = <0x0d0 0x009>; 73*4882a593Smuzhiyun #address-cells = <0>; 74*4882a593Smuzhiyun #size-cells = <0>; 75*4882a593Smuzhiyun #interrupt-cells = <2>; 76*4882a593Smuzhiyun interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 77*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun UIC2: interrupt-controller2 { 81*4882a593Smuzhiyun compatible = "ibm,uic-460gt","ibm,uic"; 82*4882a593Smuzhiyun interrupt-controller; 83*4882a593Smuzhiyun cell-index = <2>; 84*4882a593Smuzhiyun dcr-reg = <0x0e0 0x009>; 85*4882a593Smuzhiyun #address-cells = <0>; 86*4882a593Smuzhiyun #size-cells = <0>; 87*4882a593Smuzhiyun #interrupt-cells = <2>; 88*4882a593Smuzhiyun interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ 89*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun UIC3: interrupt-controller3 { 93*4882a593Smuzhiyun compatible = "ibm,uic-460gt","ibm,uic"; 94*4882a593Smuzhiyun interrupt-controller; 95*4882a593Smuzhiyun cell-index = <3>; 96*4882a593Smuzhiyun dcr-reg = <0x0f0 0x009>; 97*4882a593Smuzhiyun #address-cells = <0>; 98*4882a593Smuzhiyun #size-cells = <0>; 99*4882a593Smuzhiyun #interrupt-cells = <2>; 100*4882a593Smuzhiyun interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ 101*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun SDR0: sdr { 105*4882a593Smuzhiyun compatible = "ibm,sdr-460gt"; 106*4882a593Smuzhiyun dcr-reg = <0x00e 0x002>; 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun CPR0: cpr { 110*4882a593Smuzhiyun compatible = "ibm,cpr-460gt"; 111*4882a593Smuzhiyun dcr-reg = <0x00c 0x002>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun L2C0: l2c { 115*4882a593Smuzhiyun compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; 116*4882a593Smuzhiyun dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ 117*4882a593Smuzhiyun 0x030 0x008>; /* L2 cache DCR's */ 118*4882a593Smuzhiyun cache-line-size = <32>; /* 32 bytes */ 119*4882a593Smuzhiyun cache-size = <262144>; /* L2, 256K */ 120*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 121*4882a593Smuzhiyun interrupts = <11 1>; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun plb { 125*4882a593Smuzhiyun compatible = "ibm,plb-460gt", "ibm,plb4"; 126*4882a593Smuzhiyun #address-cells = <2>; 127*4882a593Smuzhiyun #size-cells = <1>; 128*4882a593Smuzhiyun ranges; 129*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun SDRAM0: sdram { 132*4882a593Smuzhiyun compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; 133*4882a593Smuzhiyun dcr-reg = <0x010 0x002>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun CRYPTO: crypto@180000 { 137*4882a593Smuzhiyun compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto"; 138*4882a593Smuzhiyun reg = <4 0x00180000 0x80400>; 139*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 140*4882a593Smuzhiyun interrupts = <0x1d 0x4>; 141*4882a593Smuzhiyun }; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun MAL0: mcmal { 144*4882a593Smuzhiyun compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; 145*4882a593Smuzhiyun dcr-reg = <0x180 0x062>; 146*4882a593Smuzhiyun num-tx-chans = <3>; 147*4882a593Smuzhiyun num-rx-chans = <24>; 148*4882a593Smuzhiyun #address-cells = <0>; 149*4882a593Smuzhiyun #size-cells = <0>; 150*4882a593Smuzhiyun interrupt-parent = <&UIC2>; 151*4882a593Smuzhiyun interrupts = < /*TXEOB*/ 0x6 0x4 152*4882a593Smuzhiyun /*RXEOB*/ 0x7 0x4 153*4882a593Smuzhiyun /*SERR*/ 0x3 0x4 154*4882a593Smuzhiyun /*TXDE*/ 0x4 0x4 155*4882a593Smuzhiyun /*RXDE*/ 0x5 0x4>; 156*4882a593Smuzhiyun desc-base-addr-high = <0x8>; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun POB0: opb { 160*4882a593Smuzhiyun compatible = "ibm,opb-460gt", "ibm,opb"; 161*4882a593Smuzhiyun #address-cells = <1>; 162*4882a593Smuzhiyun #size-cells = <1>; 163*4882a593Smuzhiyun ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 164*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun EBC0: ebc { 167*4882a593Smuzhiyun compatible = "ibm,ebc-460gt", "ibm,ebc"; 168*4882a593Smuzhiyun dcr-reg = <0x012 0x002>; 169*4882a593Smuzhiyun #address-cells = <2>; 170*4882a593Smuzhiyun #size-cells = <1>; 171*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 172*4882a593Smuzhiyun /* ranges property is supplied by U-Boot */ 173*4882a593Smuzhiyun interrupts = <0x6 0x4>; 174*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun nor_flash@0,0 { 177*4882a593Smuzhiyun compatible = "amd,s29gl256n", "cfi-flash"; 178*4882a593Smuzhiyun bank-width = <2>; 179*4882a593Smuzhiyun reg = <0x00000000 0x00000000 0x02000000>; 180*4882a593Smuzhiyun #address-cells = <1>; 181*4882a593Smuzhiyun #size-cells = <1>; 182*4882a593Smuzhiyun partition@0 { 183*4882a593Smuzhiyun label = "kernel"; 184*4882a593Smuzhiyun reg = <0x00000000 0x001e0000>; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun partition@1e0000 { 187*4882a593Smuzhiyun label = "dtb"; 188*4882a593Smuzhiyun reg = <0x001e0000 0x00020000>; 189*4882a593Smuzhiyun }; 190*4882a593Smuzhiyun partition@200000 { 191*4882a593Smuzhiyun label = "root"; 192*4882a593Smuzhiyun reg = <0x00200000 0x00200000>; 193*4882a593Smuzhiyun }; 194*4882a593Smuzhiyun partition@400000 { 195*4882a593Smuzhiyun label = "user"; 196*4882a593Smuzhiyun reg = <0x00400000 0x01b60000>; 197*4882a593Smuzhiyun }; 198*4882a593Smuzhiyun partition@1f60000 { 199*4882a593Smuzhiyun label = "env"; 200*4882a593Smuzhiyun reg = <0x01f60000 0x00040000>; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun partition@1fa0000 { 203*4882a593Smuzhiyun label = "u-boot"; 204*4882a593Smuzhiyun reg = <0x01fa0000 0x00060000>; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun UART0: serial@ef600300 { 210*4882a593Smuzhiyun device_type = "serial"; 211*4882a593Smuzhiyun compatible = "ns16550"; 212*4882a593Smuzhiyun reg = <0xef600300 0x00000008>; 213*4882a593Smuzhiyun virtual-reg = <0xef600300>; 214*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by U-Boot */ 215*4882a593Smuzhiyun current-speed = <0>; /* Filled in by U-Boot */ 216*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 217*4882a593Smuzhiyun interrupts = <0x1 0x4>; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun IIC0: i2c@ef600700 { 221*4882a593Smuzhiyun compatible = "ibm,iic-460gt", "ibm,iic"; 222*4882a593Smuzhiyun reg = <0xef600700 0x00000014>; 223*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 224*4882a593Smuzhiyun interrupts = <0x2 0x4>; 225*4882a593Smuzhiyun #address-cells = <1>; 226*4882a593Smuzhiyun #size-cells = <0>; 227*4882a593Smuzhiyun sttm@4a { 228*4882a593Smuzhiyun compatible = "ad,ad7414"; 229*4882a593Smuzhiyun reg = <0x4a>; 230*4882a593Smuzhiyun interrupt-parent = <&UIC1>; 231*4882a593Smuzhiyun interrupts = <0x0 0x8>; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun IIC1: i2c@ef600800 { 236*4882a593Smuzhiyun compatible = "ibm,iic-460gt", "ibm,iic"; 237*4882a593Smuzhiyun reg = <0xef600800 0x00000014>; 238*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 239*4882a593Smuzhiyun interrupts = <0x3 0x4>; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun TAH0: emac-tah@ef601350 { 243*4882a593Smuzhiyun compatible = "ibm,tah-460gt", "ibm,tah"; 244*4882a593Smuzhiyun reg = <0xef601350 0x00000030>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun TAH1: emac-tah@ef601450 { 248*4882a593Smuzhiyun compatible = "ibm,tah-460gt", "ibm,tah"; 249*4882a593Smuzhiyun reg = <0xef601450 0x00000030>; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun EMAC0: ethernet@ef600e00 { 253*4882a593Smuzhiyun device_type = "network"; 254*4882a593Smuzhiyun compatible = "ibm,emac-460gt", "ibm,emac4sync"; 255*4882a593Smuzhiyun interrupt-parent = <&EMAC0>; 256*4882a593Smuzhiyun interrupts = <0x0 0x1>; 257*4882a593Smuzhiyun #interrupt-cells = <1>; 258*4882a593Smuzhiyun #address-cells = <0>; 259*4882a593Smuzhiyun #size-cells = <0>; 260*4882a593Smuzhiyun interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 261*4882a593Smuzhiyun /*Wake*/ 0x1 &UIC2 0x14 0x4>; 262*4882a593Smuzhiyun reg = <0xef600e00 0x000000c4>; 263*4882a593Smuzhiyun local-mac-address = [000000000000]; /* Filled in by U-Boot */ 264*4882a593Smuzhiyun mal-device = <&MAL0>; 265*4882a593Smuzhiyun mal-tx-channel = <0>; 266*4882a593Smuzhiyun mal-rx-channel = <0>; 267*4882a593Smuzhiyun cell-index = <0>; 268*4882a593Smuzhiyun max-frame-size = <9000>; 269*4882a593Smuzhiyun rx-fifo-size = <4096>; 270*4882a593Smuzhiyun tx-fifo-size = <2048>; 271*4882a593Smuzhiyun rx-fifo-size-gige = <16384>; 272*4882a593Smuzhiyun phy-mode = "sgmii"; 273*4882a593Smuzhiyun phy-map = <0xffffffff>; 274*4882a593Smuzhiyun gpcs-address = <0x0000000a>; 275*4882a593Smuzhiyun tah-device = <&TAH0>; 276*4882a593Smuzhiyun tah-channel = <0>; 277*4882a593Smuzhiyun has-inverted-stacr-oc; 278*4882a593Smuzhiyun has-new-stacr-staopc; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun EMAC1: ethernet@ef600f00 { 282*4882a593Smuzhiyun device_type = "network"; 283*4882a593Smuzhiyun compatible = "ibm,emac-460gt", "ibm,emac4sync"; 284*4882a593Smuzhiyun interrupt-parent = <&EMAC1>; 285*4882a593Smuzhiyun interrupts = <0x0 0x1>; 286*4882a593Smuzhiyun #interrupt-cells = <1>; 287*4882a593Smuzhiyun #address-cells = <0>; 288*4882a593Smuzhiyun #size-cells = <0>; 289*4882a593Smuzhiyun interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 290*4882a593Smuzhiyun /*Wake*/ 0x1 &UIC2 0x15 0x4>; 291*4882a593Smuzhiyun reg = <0xef600f00 0x000000c4>; 292*4882a593Smuzhiyun local-mac-address = [000000000000]; /* Filled in by U-Boot */ 293*4882a593Smuzhiyun mal-device = <&MAL0>; 294*4882a593Smuzhiyun mal-tx-channel = <1>; 295*4882a593Smuzhiyun mal-rx-channel = <8>; 296*4882a593Smuzhiyun cell-index = <1>; 297*4882a593Smuzhiyun max-frame-size = <9000>; 298*4882a593Smuzhiyun rx-fifo-size = <4096>; 299*4882a593Smuzhiyun tx-fifo-size = <2048>; 300*4882a593Smuzhiyun rx-fifo-size-gige = <16384>; 301*4882a593Smuzhiyun phy-mode = "sgmii"; 302*4882a593Smuzhiyun phy-map = <0x00000000>; 303*4882a593Smuzhiyun gpcs-address = <0x0000000b>; 304*4882a593Smuzhiyun tah-device = <&TAH1>; 305*4882a593Smuzhiyun tah-channel = <1>; 306*4882a593Smuzhiyun has-inverted-stacr-oc; 307*4882a593Smuzhiyun has-new-stacr-staopc; 308*4882a593Smuzhiyun mdio-device = <&EMAC0>; 309*4882a593Smuzhiyun }; 310*4882a593Smuzhiyun 311*4882a593Smuzhiyun EMAC2: ethernet@ef601100 { 312*4882a593Smuzhiyun device_type = "network"; 313*4882a593Smuzhiyun compatible = "ibm,emac-460gt", "ibm,emac4sync"; 314*4882a593Smuzhiyun interrupt-parent = <&EMAC2>; 315*4882a593Smuzhiyun interrupts = <0x0 0x1>; 316*4882a593Smuzhiyun #interrupt-cells = <1>; 317*4882a593Smuzhiyun #address-cells = <0>; 318*4882a593Smuzhiyun #size-cells = <0>; 319*4882a593Smuzhiyun interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 320*4882a593Smuzhiyun /*Wake*/ 0x1 &UIC2 0x16 0x4>; 321*4882a593Smuzhiyun reg = <0xef601100 0x000000c4>; 322*4882a593Smuzhiyun local-mac-address = [000000000000]; /* Filled in by U-Boot */ 323*4882a593Smuzhiyun mal-device = <&MAL0>; 324*4882a593Smuzhiyun mal-tx-channel = <2>; 325*4882a593Smuzhiyun mal-rx-channel = <16>; 326*4882a593Smuzhiyun cell-index = <2>; 327*4882a593Smuzhiyun max-frame-size = <9000>; 328*4882a593Smuzhiyun rx-fifo-size = <4096>; 329*4882a593Smuzhiyun tx-fifo-size = <2048>; 330*4882a593Smuzhiyun rx-fifo-size-gige = <16384>; 331*4882a593Smuzhiyun tx-fifo-size-gige = <16384>; /* emac2&3 only */ 332*4882a593Smuzhiyun phy-mode = "sgmii"; 333*4882a593Smuzhiyun phy-map = <0x00000001>; 334*4882a593Smuzhiyun gpcs-address = <0x0000000C>; 335*4882a593Smuzhiyun has-inverted-stacr-oc; 336*4882a593Smuzhiyun has-new-stacr-staopc; 337*4882a593Smuzhiyun mdio-device = <&EMAC0>; 338*4882a593Smuzhiyun }; 339*4882a593Smuzhiyun }; 340*4882a593Smuzhiyun }; 341*4882a593Smuzhiyun}; 342