xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/amigaone.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * AmigaOne Device Tree Source
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	model = "AmigaOne";
12*4882a593Smuzhiyun	compatible = "eyetech,amigaone";
13*4882a593Smuzhiyun	coherency-off;
14*4882a593Smuzhiyun	#address-cells = <1>;
15*4882a593Smuzhiyun	#size-cells = <1>;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	cpus {
18*4882a593Smuzhiyun		#cpus = <1>;
19*4882a593Smuzhiyun		#address-cells = <1>;
20*4882a593Smuzhiyun		#size-cells = <0>;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun		cpu@0 {
23*4882a593Smuzhiyun			device_type = "cpu";
24*4882a593Smuzhiyun			reg = <0>;
25*4882a593Smuzhiyun			d-cache-line-size = <32>;	// 32 bytes
26*4882a593Smuzhiyun			i-cache-line-size = <32>;	// 32 bytes
27*4882a593Smuzhiyun			d-cache-size = <32768>;		// L1, 32K
28*4882a593Smuzhiyun			i-cache-size = <32768>;		// L1, 32K
29*4882a593Smuzhiyun			timebase-frequency = <0>;	// 33.3 MHz, from U-boot
30*4882a593Smuzhiyun			clock-frequency = <0>;		// From U-boot
31*4882a593Smuzhiyun			bus-frequency = <0>;		// From U-boot
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	memory {
36*4882a593Smuzhiyun		device_type = "memory";
37*4882a593Smuzhiyun		reg = <0 0>;				// From U-boot
38*4882a593Smuzhiyun	};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun	pci@80000000 {
41*4882a593Smuzhiyun		device_type = "pci";
42*4882a593Smuzhiyun		compatible = "mai-logic,articia-s";
43*4882a593Smuzhiyun		bus-frequency = <33333333>;
44*4882a593Smuzhiyun		bus-range = <0 0xff>;
45*4882a593Smuzhiyun		ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000	// PCI I/O
46*4882a593Smuzhiyun		          0x02000000 0 0x80000000 0x80000000 0 0x7d000000	// PCI memory
47*4882a593Smuzhiyun		          0x02000000 0 0x00000000 0xfd000000 0 0x01000000>;	// PCI alias memory (ISA)
48*4882a593Smuzhiyun		// Configuration address and data register.
49*4882a593Smuzhiyun		reg = <0xfec00cf8 4
50*4882a593Smuzhiyun		       0xfee00cfc 4>;
51*4882a593Smuzhiyun		8259-interrupt-acknowledge = <0xfef00000>;
52*4882a593Smuzhiyun		// Do not define a interrupt-parent here, if there is no
53*4882a593Smuzhiyun		// interrupt-map property.
54*4882a593Smuzhiyun		#address-cells = <3>;
55*4882a593Smuzhiyun		#size-cells = <2>;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun		isa@7 {
58*4882a593Smuzhiyun			device_type = "isa";
59*4882a593Smuzhiyun			compatible = "pciclass,0601";
60*4882a593Smuzhiyun			vendor-id = <0x00001106>;
61*4882a593Smuzhiyun			device-id = <0x00000686>;
62*4882a593Smuzhiyun			revision-id = <0x00000010>;
63*4882a593Smuzhiyun			class-code = <0x00060100>;
64*4882a593Smuzhiyun			subsystem-id = <0>;
65*4882a593Smuzhiyun			subsystem-vendor-id = <0>;
66*4882a593Smuzhiyun			devsel-speed = <0x00000001>;
67*4882a593Smuzhiyun			min-grant = <0>;
68*4882a593Smuzhiyun			max-latency = <0>;
69*4882a593Smuzhiyun			/* First 4k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
70*4882a593Smuzhiyun			ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
71*4882a593Smuzhiyun			interrupt-parent = <&i8259>;
72*4882a593Smuzhiyun			#interrupt-cells = <2>;
73*4882a593Smuzhiyun			#address-cells = <2>;
74*4882a593Smuzhiyun			#size-cells = <1>;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun			dma-controller@0 {
77*4882a593Smuzhiyun				compatible = "pnpPNP,200";
78*4882a593Smuzhiyun				reg = <1 0x00000000 0x00000020
79*4882a593Smuzhiyun				       1 0x00000080 0x00000010
80*4882a593Smuzhiyun				       1 0x000000c0 0x00000020>;
81*4882a593Smuzhiyun			};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun			i8259: interrupt-controller@20 {
84*4882a593Smuzhiyun				device_type = "interrupt-controller";
85*4882a593Smuzhiyun				compatible = "pnpPNP,000";
86*4882a593Smuzhiyun				interrupt-controller;
87*4882a593Smuzhiyun				reg = <1 0x00000020 0x00000002
88*4882a593Smuzhiyun				       1 0x000000a0 0x00000002
89*4882a593Smuzhiyun				       1 0x000004d0 0x00000002>;
90*4882a593Smuzhiyun				reserved-interrupts = <2>;
91*4882a593Smuzhiyun				#interrupt-cells = <2>;
92*4882a593Smuzhiyun			};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun			timer@40 {
95*4882a593Smuzhiyun				// Also adds pcspkr to platform devices.
96*4882a593Smuzhiyun				compatible = "pnpPNP,100";
97*4882a593Smuzhiyun				reg = <1 0x00000040 0x00000020>;
98*4882a593Smuzhiyun			};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun			8042@60 {
101*4882a593Smuzhiyun				device_type = "8042";
102*4882a593Smuzhiyun				reg = <1 0x00000060 0x00000001
103*4882a593Smuzhiyun				       1 0x00000064 0x00000001>;
104*4882a593Smuzhiyun				interrupts = <1 3 12 3>;
105*4882a593Smuzhiyun				#address-cells = <1>;
106*4882a593Smuzhiyun				#size-cells = <0>;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun				keyboard@0 {
109*4882a593Smuzhiyun					compatible = "pnpPNP,303";
110*4882a593Smuzhiyun					reg = <0>;
111*4882a593Smuzhiyun				};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun				mouse@1 {
114*4882a593Smuzhiyun					compatible = "pnpPNP,f03";
115*4882a593Smuzhiyun					reg = <1>;
116*4882a593Smuzhiyun				};
117*4882a593Smuzhiyun			};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun			rtc@70 {
120*4882a593Smuzhiyun				compatible = "pnpPNP,b00";
121*4882a593Smuzhiyun				reg = <1 0x00000070 0x00000002>;
122*4882a593Smuzhiyun				interrupts = <8 3>;
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun			serial@3f8 {
126*4882a593Smuzhiyun				device_type = "serial";
127*4882a593Smuzhiyun				compatible = "pnpPNP,501","pnpPNP,500";
128*4882a593Smuzhiyun				reg = <1 0x000003f8 0x00000008>;
129*4882a593Smuzhiyun				interrupts = <4 3>;
130*4882a593Smuzhiyun				clock-frequency = <1843200>;
131*4882a593Smuzhiyun				current-speed = <115200>;
132*4882a593Smuzhiyun			};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun			serial@2f8 {
135*4882a593Smuzhiyun				device_type = "serial";
136*4882a593Smuzhiyun				compatible = "pnpPNP,501","pnpPNP,500";
137*4882a593Smuzhiyun				reg = <1 0x000002f8 0x00000008>;
138*4882a593Smuzhiyun				interrupts = <3 3>;
139*4882a593Smuzhiyun				clock-frequency = <1843200>;
140*4882a593Smuzhiyun				current-speed = <115200>;
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun			parallel@378 {
144*4882a593Smuzhiyun				device_type = "parallel";
145*4882a593Smuzhiyun				// No ECP support for now, otherwise add "pnpPNP,401".
146*4882a593Smuzhiyun				compatible = "pnpPNP,400";
147*4882a593Smuzhiyun				reg = <1 0x00000378 0x00000003
148*4882a593Smuzhiyun				       1 0x00000778 0x00000003>;
149*4882a593Smuzhiyun			};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun			fdc@3f0 {
152*4882a593Smuzhiyun				device_type = "fdc";
153*4882a593Smuzhiyun				compatible = "pnpPNP,700";
154*4882a593Smuzhiyun				reg = <1 0x000003f0 0x00000008>;
155*4882a593Smuzhiyun				interrupts = <6 3>;
156*4882a593Smuzhiyun				#address-cells = <1>;
157*4882a593Smuzhiyun				#size-cells = <0>;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun				disk@0 {
160*4882a593Smuzhiyun					reg = <0>;
161*4882a593Smuzhiyun				};
162*4882a593Smuzhiyun			};
163*4882a593Smuzhiyun		};
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	chosen {
167*4882a593Smuzhiyun		stdout-path = "/pci@80000000/isa@7/serial@3f8";
168*4882a593Smuzhiyun	};
169*4882a593Smuzhiyun};
170