1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Device Tree Source for AMCC Acadia (405EZ) 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright IBM Corp. 2008 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License 7*4882a593Smuzhiyun * version 2. This program is licensed "as is" without any warranty of any 8*4882a593Smuzhiyun * kind, whether express or implied. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun/ { 14*4882a593Smuzhiyun #address-cells = <1>; 15*4882a593Smuzhiyun #size-cells = <1>; 16*4882a593Smuzhiyun model = "amcc,acadia"; 17*4882a593Smuzhiyun compatible = "amcc,acadia"; 18*4882a593Smuzhiyun dcr-parent = <&{/cpus/cpu@0}>; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun aliases { 21*4882a593Smuzhiyun ethernet0 = &EMAC0; 22*4882a593Smuzhiyun serial0 = &UART0; 23*4882a593Smuzhiyun serial1 = &UART1; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun cpus { 27*4882a593Smuzhiyun #address-cells = <1>; 28*4882a593Smuzhiyun #size-cells = <0>; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun cpu@0 { 31*4882a593Smuzhiyun device_type = "cpu"; 32*4882a593Smuzhiyun model = "PowerPC,405EZ"; 33*4882a593Smuzhiyun reg = <0x0>; 34*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by wrapper */ 35*4882a593Smuzhiyun timebase-frequency = <0>; /* Filled in by wrapper */ 36*4882a593Smuzhiyun i-cache-line-size = <32>; 37*4882a593Smuzhiyun d-cache-line-size = <32>; 38*4882a593Smuzhiyun i-cache-size = <16384>; 39*4882a593Smuzhiyun d-cache-size = <16384>; 40*4882a593Smuzhiyun dcr-controller; 41*4882a593Smuzhiyun dcr-access-method = "native"; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun memory { 46*4882a593Smuzhiyun device_type = "memory"; 47*4882a593Smuzhiyun reg = <0x0 0x0>; /* Filled in by wrapper */ 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun UIC0: interrupt-controller { 51*4882a593Smuzhiyun compatible = "ibm,uic-405ez", "ibm,uic"; 52*4882a593Smuzhiyun interrupt-controller; 53*4882a593Smuzhiyun dcr-reg = <0x0c0 0x009>; 54*4882a593Smuzhiyun cell-index = <0>; 55*4882a593Smuzhiyun #address-cells = <0>; 56*4882a593Smuzhiyun #size-cells = <0>; 57*4882a593Smuzhiyun #interrupt-cells = <2>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun plb { 61*4882a593Smuzhiyun compatible = "ibm,plb-405ez", "ibm,plb3"; 62*4882a593Smuzhiyun #address-cells = <1>; 63*4882a593Smuzhiyun #size-cells = <1>; 64*4882a593Smuzhiyun ranges; 65*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by wrapper */ 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun MAL0: mcmal { 68*4882a593Smuzhiyun compatible = "ibm,mcmal-405ez", "ibm,mcmal"; 69*4882a593Smuzhiyun dcr-reg = <0x380 0x62>; 70*4882a593Smuzhiyun num-tx-chans = <1>; 71*4882a593Smuzhiyun num-rx-chans = <1>; 72*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 73*4882a593Smuzhiyun /* 405EZ has only 3 interrupts to the UIC, as 74*4882a593Smuzhiyun * SERR, TXDE, and RXDE are or'd together into 75*4882a593Smuzhiyun * one UIC bit 76*4882a593Smuzhiyun */ 77*4882a593Smuzhiyun interrupts = < 78*4882a593Smuzhiyun 0x13 0x4 /* TXEOB */ 79*4882a593Smuzhiyun 0x15 0x4 /* RXEOB */ 80*4882a593Smuzhiyun 0x12 0x4 /* SERR, TXDE, RXDE */>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun POB0: opb { 84*4882a593Smuzhiyun compatible = "ibm,opb-405ez", "ibm,opb"; 85*4882a593Smuzhiyun #address-cells = <1>; 86*4882a593Smuzhiyun #size-cells = <1>; 87*4882a593Smuzhiyun ranges; 88*4882a593Smuzhiyun dcr-reg = <0x0a 0x05>; 89*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by wrapper */ 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun UART0: serial@ef600300 { 92*4882a593Smuzhiyun device_type = "serial"; 93*4882a593Smuzhiyun compatible = "ns16550"; 94*4882a593Smuzhiyun reg = <0xef600300 0x8>; 95*4882a593Smuzhiyun virtual-reg = <0xef600300>; 96*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by wrapper */ 97*4882a593Smuzhiyun current-speed = <115200>; 98*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 99*4882a593Smuzhiyun interrupts = <0x5 0x4>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun UART1: serial@ef600400 { 103*4882a593Smuzhiyun device_type = "serial"; 104*4882a593Smuzhiyun compatible = "ns16550"; 105*4882a593Smuzhiyun reg = <0xef600400 0x8>; 106*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by wrapper */ 107*4882a593Smuzhiyun current-speed = <115200>; 108*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 109*4882a593Smuzhiyun interrupts = <0x6 0x4>; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun IIC: i2c@ef600500 { 113*4882a593Smuzhiyun compatible = "ibm,iic-405ez", "ibm,iic"; 114*4882a593Smuzhiyun reg = <0xef600500 0x11>; 115*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 116*4882a593Smuzhiyun interrupts = <0xa 0x4>; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun GPIO0: gpio@ef600700 { 120*4882a593Smuzhiyun compatible = "ibm,gpio-405ez"; 121*4882a593Smuzhiyun reg = <0xef600700 0x20>; 122*4882a593Smuzhiyun }; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun GPIO1: gpio@ef600800 { 125*4882a593Smuzhiyun compatible = "ibm,gpio-405ez"; 126*4882a593Smuzhiyun reg = <0xef600800 0x20>; 127*4882a593Smuzhiyun }; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun EMAC0: ethernet@ef600900 { 130*4882a593Smuzhiyun device_type = "network"; 131*4882a593Smuzhiyun compatible = "ibm,emac-405ez", "ibm,emac"; 132*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 133*4882a593Smuzhiyun interrupts = < 134*4882a593Smuzhiyun 0x10 0x4 /* Ethernet */ 135*4882a593Smuzhiyun 0x11 0x4 /* Ethernet Wake up */>; 136*4882a593Smuzhiyun local-mac-address = [000000000000]; /* Filled in by wrapper */ 137*4882a593Smuzhiyun reg = <0xef600900 0x70>; 138*4882a593Smuzhiyun mal-device = <&MAL0>; 139*4882a593Smuzhiyun mal-tx-channel = <0>; 140*4882a593Smuzhiyun mal-rx-channel = <0>; 141*4882a593Smuzhiyun cell-index = <0>; 142*4882a593Smuzhiyun max-frame-size = <1500>; 143*4882a593Smuzhiyun rx-fifo-size = <4096>; 144*4882a593Smuzhiyun tx-fifo-size = <2048>; 145*4882a593Smuzhiyun phy-mode = "mii"; 146*4882a593Smuzhiyun phy-map = <0x0>; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun CAN0: can@ef601000 { 150*4882a593Smuzhiyun compatible = "amcc,can-405ez"; 151*4882a593Smuzhiyun reg = <0xef601000 0x620>; 152*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 153*4882a593Smuzhiyun interrupts = <0x7 0x4>; 154*4882a593Smuzhiyun }; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun CAN1: can@ef601800 { 157*4882a593Smuzhiyun compatible = "amcc,can-405ez"; 158*4882a593Smuzhiyun reg = <0xef601800 0x620>; 159*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 160*4882a593Smuzhiyun interrupts = <0x8 0x4>; 161*4882a593Smuzhiyun }; 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun cameleon@ef602000 { 164*4882a593Smuzhiyun compatible = "amcc,cameleon-405ez"; 165*4882a593Smuzhiyun reg = <0xef602000 0x800>; 166*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 167*4882a593Smuzhiyun interrupts = <0xb 0x4 0xc 0x4>; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun ieee1588@ef602800 { 171*4882a593Smuzhiyun compatible = "amcc,ieee1588-405ez"; 172*4882a593Smuzhiyun reg = <0xef602800 0x60>; 173*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 174*4882a593Smuzhiyun interrupts = <0x4 0x4>; 175*4882a593Smuzhiyun /* This thing is a bit weird. It has it's own UIC 176*4882a593Smuzhiyun * that it uses to generate snapshot triggers. We 177*4882a593Smuzhiyun * don't really support this device yet, and it needs 178*4882a593Smuzhiyun * work to figure this out. 179*4882a593Smuzhiyun */ 180*4882a593Smuzhiyun dcr-reg = <0xe0 0x9>; 181*4882a593Smuzhiyun }; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun usb@ef603000 { 184*4882a593Smuzhiyun compatible = "ohci-be"; 185*4882a593Smuzhiyun reg = <0xef603000 0x80>; 186*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 187*4882a593Smuzhiyun interrupts = <0xd 0x4 0xe 0x4>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun dac@ef603300 { 191*4882a593Smuzhiyun compatible = "amcc,dac-405ez"; 192*4882a593Smuzhiyun reg = <0xef603300 0x40>; 193*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 194*4882a593Smuzhiyun interrupts = <0x18 0x4>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun adc@ef603400 { 198*4882a593Smuzhiyun compatible = "amcc,adc-405ez"; 199*4882a593Smuzhiyun reg = <0xef603400 0x40>; 200*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 201*4882a593Smuzhiyun interrupts = <0x17 0x4>; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun spi@ef603500 { 205*4882a593Smuzhiyun compatible = "amcc,spi-405ez"; 206*4882a593Smuzhiyun reg = <0xef603500 0x100>; 207*4882a593Smuzhiyun interrupt-parent = <&UIC0>; 208*4882a593Smuzhiyun interrupts = <0x9 0x4>; 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun EBC0: ebc { 213*4882a593Smuzhiyun compatible = "ibm,ebc-405ez", "ibm,ebc"; 214*4882a593Smuzhiyun dcr-reg = <0x12 0x2>; 215*4882a593Smuzhiyun #address-cells = <2>; 216*4882a593Smuzhiyun #size-cells = <1>; 217*4882a593Smuzhiyun clock-frequency = <0>; /* Filled in by wrapper */ 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun chosen { 222*4882a593Smuzhiyun stdout-path = "/plb/opb/serial@ef600300"; 223*4882a593Smuzhiyun }; 224*4882a593Smuzhiyun}; 225