1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Linux/PA-RISC Project (http://www.parisc-linux.org/)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Floating-point emulation code
6*4882a593Smuzhiyun * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun * BEGIN_DESC
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * File:
12*4882a593Smuzhiyun * @(#) pa/spmath/fcnvuf.c $Revision: 1.1 $
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * Purpose:
15*4882a593Smuzhiyun * Fixed point to Floating-point Converts
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * External Interfaces:
18*4882a593Smuzhiyun * dbl_to_dbl_fcnvuf(srcptr,nullptr,dstptr,status)
19*4882a593Smuzhiyun * dbl_to_sgl_fcnvuf(srcptr,nullptr,dstptr,status)
20*4882a593Smuzhiyun * sgl_to_dbl_fcnvuf(srcptr,nullptr,dstptr,status)
21*4882a593Smuzhiyun * sgl_to_sgl_fcnvuf(srcptr,nullptr,dstptr,status)
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * Internal Interfaces:
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun * Theory:
26*4882a593Smuzhiyun * <<please update with a overview of the operation of this file>>
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * END_DESC
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include "float.h"
33*4882a593Smuzhiyun #include "sgl_float.h"
34*4882a593Smuzhiyun #include "dbl_float.h"
35*4882a593Smuzhiyun #include "cnv_float.h"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /************************************************************************
38*4882a593Smuzhiyun * Fixed point to Floating-point Converts *
39*4882a593Smuzhiyun ************************************************************************/
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun * Convert Single Unsigned Fixed to Single Floating-point format
43*4882a593Smuzhiyun */
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun int
sgl_to_sgl_fcnvuf(unsigned int * srcptr,unsigned int * nullptr,sgl_floating_point * dstptr,unsigned int * status)46*4882a593Smuzhiyun sgl_to_sgl_fcnvuf(
47*4882a593Smuzhiyun unsigned int *srcptr,
48*4882a593Smuzhiyun unsigned int *nullptr,
49*4882a593Smuzhiyun sgl_floating_point *dstptr,
50*4882a593Smuzhiyun unsigned int *status)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun register unsigned int src, result = 0;
53*4882a593Smuzhiyun register int dst_exponent;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun src = *srcptr;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* Check for zero */
58*4882a593Smuzhiyun if (src == 0) {
59*4882a593Smuzhiyun Sgl_setzero(result);
60*4882a593Smuzhiyun *dstptr = result;
61*4882a593Smuzhiyun return(NOEXCEPTION);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * Generate exponent and normalized mantissa
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun dst_exponent = 16; /* initialize for normalization */
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun * Check word for most significant bit set. Returns
69*4882a593Smuzhiyun * a value in dst_exponent indicating the bit position,
70*4882a593Smuzhiyun * between -1 and 30.
71*4882a593Smuzhiyun */
72*4882a593Smuzhiyun Find_ms_one_bit(src,dst_exponent);
73*4882a593Smuzhiyun /* left justify source, with msb at bit position 0 */
74*4882a593Smuzhiyun src <<= dst_exponent+1;
75*4882a593Smuzhiyun Sgl_set_mantissa(result, src >> SGL_EXP_LENGTH);
76*4882a593Smuzhiyun Sgl_set_exponent(result, 30+SGL_BIAS - dst_exponent);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /* check for inexact */
79*4882a593Smuzhiyun if (Suint_isinexact_to_sgl(src)) {
80*4882a593Smuzhiyun switch (Rounding_mode()) {
81*4882a593Smuzhiyun case ROUNDPLUS:
82*4882a593Smuzhiyun Sgl_increment(result);
83*4882a593Smuzhiyun break;
84*4882a593Smuzhiyun case ROUNDMINUS: /* never negative */
85*4882a593Smuzhiyun break;
86*4882a593Smuzhiyun case ROUNDNEAREST:
87*4882a593Smuzhiyun Sgl_roundnearest_from_suint(src,result);
88*4882a593Smuzhiyun break;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun if (Is_inexacttrap_enabled()) {
91*4882a593Smuzhiyun *dstptr = result;
92*4882a593Smuzhiyun return(INEXACTEXCEPTION);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun else Set_inexactflag();
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun *dstptr = result;
97*4882a593Smuzhiyun return(NOEXCEPTION);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /*
101*4882a593Smuzhiyun * Single Unsigned Fixed to Double Floating-point
102*4882a593Smuzhiyun */
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun int
sgl_to_dbl_fcnvuf(unsigned int * srcptr,unsigned int * nullptr,dbl_floating_point * dstptr,unsigned int * status)105*4882a593Smuzhiyun sgl_to_dbl_fcnvuf(
106*4882a593Smuzhiyun unsigned int *srcptr,
107*4882a593Smuzhiyun unsigned int *nullptr,
108*4882a593Smuzhiyun dbl_floating_point *dstptr,
109*4882a593Smuzhiyun unsigned int *status)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun register int dst_exponent;
112*4882a593Smuzhiyun register unsigned int src, resultp1 = 0, resultp2 = 0;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun src = *srcptr;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* Check for zero */
117*4882a593Smuzhiyun if (src == 0) {
118*4882a593Smuzhiyun Dbl_setzero(resultp1,resultp2);
119*4882a593Smuzhiyun Dbl_copytoptr(resultp1,resultp2,dstptr);
120*4882a593Smuzhiyun return(NOEXCEPTION);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun /*
123*4882a593Smuzhiyun * Generate exponent and normalized mantissa
124*4882a593Smuzhiyun */
125*4882a593Smuzhiyun dst_exponent = 16; /* initialize for normalization */
126*4882a593Smuzhiyun /*
127*4882a593Smuzhiyun * Check word for most significant bit set. Returns
128*4882a593Smuzhiyun * a value in dst_exponent indicating the bit position,
129*4882a593Smuzhiyun * between -1 and 30.
130*4882a593Smuzhiyun */
131*4882a593Smuzhiyun Find_ms_one_bit(src,dst_exponent);
132*4882a593Smuzhiyun /* left justify source, with msb at bit position 0 */
133*4882a593Smuzhiyun src <<= dst_exponent+1;
134*4882a593Smuzhiyun Dbl_set_mantissap1(resultp1, src >> DBL_EXP_LENGTH);
135*4882a593Smuzhiyun Dbl_set_mantissap2(resultp2, src << (32-DBL_EXP_LENGTH));
136*4882a593Smuzhiyun Dbl_set_exponent(resultp1, (30+DBL_BIAS) - dst_exponent);
137*4882a593Smuzhiyun Dbl_copytoptr(resultp1,resultp2,dstptr);
138*4882a593Smuzhiyun return(NOEXCEPTION);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun * Double Unsigned Fixed to Single Floating-point
143*4882a593Smuzhiyun */
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun int
dbl_to_sgl_fcnvuf(dbl_unsigned * srcptr,unsigned int * nullptr,sgl_floating_point * dstptr,unsigned int * status)146*4882a593Smuzhiyun dbl_to_sgl_fcnvuf(
147*4882a593Smuzhiyun dbl_unsigned *srcptr,
148*4882a593Smuzhiyun unsigned int *nullptr,
149*4882a593Smuzhiyun sgl_floating_point *dstptr,
150*4882a593Smuzhiyun unsigned int *status)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun int dst_exponent;
153*4882a593Smuzhiyun unsigned int srcp1, srcp2, result = 0;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun Duint_copyfromptr(srcptr,srcp1,srcp2);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /* Check for zero */
158*4882a593Smuzhiyun if (srcp1 == 0 && srcp2 == 0) {
159*4882a593Smuzhiyun Sgl_setzero(result);
160*4882a593Smuzhiyun *dstptr = result;
161*4882a593Smuzhiyun return(NOEXCEPTION);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun /*
164*4882a593Smuzhiyun * Generate exponent and normalized mantissa
165*4882a593Smuzhiyun */
166*4882a593Smuzhiyun dst_exponent = 16; /* initialize for normalization */
167*4882a593Smuzhiyun if (srcp1 == 0) {
168*4882a593Smuzhiyun /*
169*4882a593Smuzhiyun * Check word for most significant bit set. Returns
170*4882a593Smuzhiyun * a value in dst_exponent indicating the bit position,
171*4882a593Smuzhiyun * between -1 and 30.
172*4882a593Smuzhiyun */
173*4882a593Smuzhiyun Find_ms_one_bit(srcp2,dst_exponent);
174*4882a593Smuzhiyun /* left justify source, with msb at bit position 0 */
175*4882a593Smuzhiyun srcp1 = srcp2 << dst_exponent+1;
176*4882a593Smuzhiyun srcp2 = 0;
177*4882a593Smuzhiyun /*
178*4882a593Smuzhiyun * since msb set is in second word, need to
179*4882a593Smuzhiyun * adjust bit position count
180*4882a593Smuzhiyun */
181*4882a593Smuzhiyun dst_exponent += 32;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun else {
184*4882a593Smuzhiyun /*
185*4882a593Smuzhiyun * Check word for most significant bit set. Returns
186*4882a593Smuzhiyun * a value in dst_exponent indicating the bit position,
187*4882a593Smuzhiyun * between -1 and 30.
188*4882a593Smuzhiyun *
189*4882a593Smuzhiyun */
190*4882a593Smuzhiyun Find_ms_one_bit(srcp1,dst_exponent);
191*4882a593Smuzhiyun /* left justify source, with msb at bit position 0 */
192*4882a593Smuzhiyun if (dst_exponent >= 0) {
193*4882a593Smuzhiyun Variable_shift_double(srcp1,srcp2,(31-dst_exponent),
194*4882a593Smuzhiyun srcp1);
195*4882a593Smuzhiyun srcp2 <<= dst_exponent+1;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun Sgl_set_mantissa(result, srcp1 >> SGL_EXP_LENGTH);
199*4882a593Smuzhiyun Sgl_set_exponent(result, (62+SGL_BIAS) - dst_exponent);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun /* check for inexact */
202*4882a593Smuzhiyun if (Duint_isinexact_to_sgl(srcp1,srcp2)) {
203*4882a593Smuzhiyun switch (Rounding_mode()) {
204*4882a593Smuzhiyun case ROUNDPLUS:
205*4882a593Smuzhiyun Sgl_increment(result);
206*4882a593Smuzhiyun break;
207*4882a593Smuzhiyun case ROUNDMINUS: /* never negative */
208*4882a593Smuzhiyun break;
209*4882a593Smuzhiyun case ROUNDNEAREST:
210*4882a593Smuzhiyun Sgl_roundnearest_from_duint(srcp1,srcp2,result);
211*4882a593Smuzhiyun break;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun if (Is_inexacttrap_enabled()) {
214*4882a593Smuzhiyun *dstptr = result;
215*4882a593Smuzhiyun return(INEXACTEXCEPTION);
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun else Set_inexactflag();
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun *dstptr = result;
220*4882a593Smuzhiyun return(NOEXCEPTION);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /*
224*4882a593Smuzhiyun * Double Unsigned Fixed to Double Floating-point
225*4882a593Smuzhiyun */
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun int
dbl_to_dbl_fcnvuf(dbl_unsigned * srcptr,unsigned int * nullptr,dbl_floating_point * dstptr,unsigned int * status)228*4882a593Smuzhiyun dbl_to_dbl_fcnvuf(
229*4882a593Smuzhiyun dbl_unsigned *srcptr,
230*4882a593Smuzhiyun unsigned int *nullptr,
231*4882a593Smuzhiyun dbl_floating_point *dstptr,
232*4882a593Smuzhiyun unsigned int *status)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun register int dst_exponent;
235*4882a593Smuzhiyun register unsigned int srcp1, srcp2, resultp1 = 0, resultp2 = 0;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun Duint_copyfromptr(srcptr,srcp1,srcp2);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /* Check for zero */
240*4882a593Smuzhiyun if (srcp1 == 0 && srcp2 ==0) {
241*4882a593Smuzhiyun Dbl_setzero(resultp1,resultp2);
242*4882a593Smuzhiyun Dbl_copytoptr(resultp1,resultp2,dstptr);
243*4882a593Smuzhiyun return(NOEXCEPTION);
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun /*
246*4882a593Smuzhiyun * Generate exponent and normalized mantissa
247*4882a593Smuzhiyun */
248*4882a593Smuzhiyun dst_exponent = 16; /* initialize for normalization */
249*4882a593Smuzhiyun if (srcp1 == 0) {
250*4882a593Smuzhiyun /*
251*4882a593Smuzhiyun * Check word for most significant bit set. Returns
252*4882a593Smuzhiyun * a value in dst_exponent indicating the bit position,
253*4882a593Smuzhiyun * between -1 and 30.
254*4882a593Smuzhiyun */
255*4882a593Smuzhiyun Find_ms_one_bit(srcp2,dst_exponent);
256*4882a593Smuzhiyun /* left justify source, with msb at bit position 0 */
257*4882a593Smuzhiyun srcp1 = srcp2 << dst_exponent+1;
258*4882a593Smuzhiyun srcp2 = 0;
259*4882a593Smuzhiyun /*
260*4882a593Smuzhiyun * since msb set is in second word, need to
261*4882a593Smuzhiyun * adjust bit position count
262*4882a593Smuzhiyun */
263*4882a593Smuzhiyun dst_exponent += 32;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun else {
266*4882a593Smuzhiyun /*
267*4882a593Smuzhiyun * Check word for most significant bit set. Returns
268*4882a593Smuzhiyun * a value in dst_exponent indicating the bit position,
269*4882a593Smuzhiyun * between -1 and 30.
270*4882a593Smuzhiyun */
271*4882a593Smuzhiyun Find_ms_one_bit(srcp1,dst_exponent);
272*4882a593Smuzhiyun /* left justify source, with msb at bit position 0 */
273*4882a593Smuzhiyun if (dst_exponent >= 0) {
274*4882a593Smuzhiyun Variable_shift_double(srcp1,srcp2,(31-dst_exponent),
275*4882a593Smuzhiyun srcp1);
276*4882a593Smuzhiyun srcp2 <<= dst_exponent+1;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun Dbl_set_mantissap1(resultp1, srcp1 >> DBL_EXP_LENGTH);
280*4882a593Smuzhiyun Shiftdouble(srcp1,srcp2,DBL_EXP_LENGTH,resultp2);
281*4882a593Smuzhiyun Dbl_set_exponent(resultp1, (62+DBL_BIAS) - dst_exponent);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /* check for inexact */
284*4882a593Smuzhiyun if (Duint_isinexact_to_dbl(srcp2)) {
285*4882a593Smuzhiyun switch (Rounding_mode()) {
286*4882a593Smuzhiyun case ROUNDPLUS:
287*4882a593Smuzhiyun Dbl_increment(resultp1,resultp2);
288*4882a593Smuzhiyun break;
289*4882a593Smuzhiyun case ROUNDMINUS: /* never negative */
290*4882a593Smuzhiyun break;
291*4882a593Smuzhiyun case ROUNDNEAREST:
292*4882a593Smuzhiyun Dbl_roundnearest_from_duint(srcp2,resultp1,
293*4882a593Smuzhiyun resultp2);
294*4882a593Smuzhiyun break;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun if (Is_inexacttrap_enabled()) {
297*4882a593Smuzhiyun Dbl_copytoptr(resultp1,resultp2,dstptr);
298*4882a593Smuzhiyun return(INEXACTEXCEPTION);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun else Set_inexactflag();
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun Dbl_copytoptr(resultp1,resultp2,dstptr);
303*4882a593Smuzhiyun return(NOEXCEPTION);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306