xref: /OK3568_Linux_fs/kernel/arch/parisc/include/asm/checksum.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _PARISC_CHECKSUM_H
3*4882a593Smuzhiyun #define _PARISC_CHECKSUM_H
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #include <linux/in6.h>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun /*
8*4882a593Smuzhiyun  * computes the checksum of a memory block at buff, length len,
9*4882a593Smuzhiyun  * and adds in "sum" (32-bit)
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * returns a 32-bit number suitable for feeding into itself
12*4882a593Smuzhiyun  * or csum_tcpudp_magic
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * this function must be called with even lengths, except
15*4882a593Smuzhiyun  * for the last fragment, which may be odd
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  * it's best to have buff aligned on a 32-bit boundary
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun extern __wsum csum_partial(const void *, int, __wsum);
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /*
22*4882a593Smuzhiyun  *	Optimized for IP headers, which always checksum on 4 octet boundaries.
23*4882a593Smuzhiyun  *
24*4882a593Smuzhiyun  *	Written by Randolph Chung <tausq@debian.org>, and then mucked with by
25*4882a593Smuzhiyun  *	LaMont Jones <lamont@debian.org>
26*4882a593Smuzhiyun  */
ip_fast_csum(const void * iph,unsigned int ihl)27*4882a593Smuzhiyun static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun 	unsigned int sum;
30*4882a593Smuzhiyun 	unsigned long t0, t1, t2;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	__asm__ __volatile__ (
33*4882a593Smuzhiyun "	ldws,ma		4(%1), %0\n"
34*4882a593Smuzhiyun "	addib,<=	-4, %2, 2f\n"
35*4882a593Smuzhiyun "\n"
36*4882a593Smuzhiyun "	ldws		4(%1), %4\n"
37*4882a593Smuzhiyun "	ldws		8(%1), %5\n"
38*4882a593Smuzhiyun "	add		%0, %4, %0\n"
39*4882a593Smuzhiyun "	ldws,ma		12(%1), %3\n"
40*4882a593Smuzhiyun "	addc		%0, %5, %0\n"
41*4882a593Smuzhiyun "	addc		%0, %3, %0\n"
42*4882a593Smuzhiyun "1:	ldws,ma		4(%1), %3\n"
43*4882a593Smuzhiyun "	addib,<		0, %2, 1b\n"
44*4882a593Smuzhiyun "	addc		%0, %3, %0\n"
45*4882a593Smuzhiyun "\n"
46*4882a593Smuzhiyun "	extru		%0, 31, 16, %4\n"
47*4882a593Smuzhiyun "	extru		%0, 15, 16, %5\n"
48*4882a593Smuzhiyun "	addc		%4, %5, %0\n"
49*4882a593Smuzhiyun "	extru		%0, 15, 16, %5\n"
50*4882a593Smuzhiyun "	add		%0, %5, %0\n"
51*4882a593Smuzhiyun "	subi		-1, %0, %0\n"
52*4882a593Smuzhiyun "2:\n"
53*4882a593Smuzhiyun 	: "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (t0), "=r" (t1), "=r" (t2)
54*4882a593Smuzhiyun 	: "1" (iph), "2" (ihl)
55*4882a593Smuzhiyun 	: "memory");
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	return (__force __sum16)sum;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun  *	Fold a partial checksum
62*4882a593Smuzhiyun  */
csum_fold(__wsum csum)63*4882a593Smuzhiyun static inline __sum16 csum_fold(__wsum csum)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	u32 sum = (__force u32)csum;
66*4882a593Smuzhiyun 	/* add the swapped two 16-bit halves of sum,
67*4882a593Smuzhiyun 	   a possible carry from adding the two 16-bit halves,
68*4882a593Smuzhiyun 	   will carry from the lower half into the upper half,
69*4882a593Smuzhiyun 	   giving us the correct sum in the upper half. */
70*4882a593Smuzhiyun 	sum += (sum << 16) + (sum >> 16);
71*4882a593Smuzhiyun 	return (__force __sum16)(~sum >> 16);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
csum_tcpudp_nofold(__be32 saddr,__be32 daddr,__u32 len,__u8 proto,__wsum sum)74*4882a593Smuzhiyun static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
75*4882a593Smuzhiyun 					__u32 len, __u8 proto,
76*4882a593Smuzhiyun 					__wsum sum)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	__asm__(
79*4882a593Smuzhiyun 	"	add  %1, %0, %0\n"
80*4882a593Smuzhiyun 	"	addc %2, %0, %0\n"
81*4882a593Smuzhiyun 	"	addc %3, %0, %0\n"
82*4882a593Smuzhiyun 	"	addc %%r0, %0, %0\n"
83*4882a593Smuzhiyun 		: "=r" (sum)
84*4882a593Smuzhiyun 		: "r" (daddr), "r"(saddr), "r"(proto+len), "0"(sum));
85*4882a593Smuzhiyun 	return sum;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /*
89*4882a593Smuzhiyun  * computes the checksum of the TCP/UDP pseudo-header
90*4882a593Smuzhiyun  * returns a 16-bit checksum, already complemented
91*4882a593Smuzhiyun  */
csum_tcpudp_magic(__be32 saddr,__be32 daddr,__u32 len,__u8 proto,__wsum sum)92*4882a593Smuzhiyun static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
93*4882a593Smuzhiyun 					__u32 len, __u8 proto,
94*4882a593Smuzhiyun 					__wsum sum)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /*
100*4882a593Smuzhiyun  * this routine is used for miscellaneous IP-like checksums, mainly
101*4882a593Smuzhiyun  * in icmp.c
102*4882a593Smuzhiyun  */
ip_compute_csum(const void * buf,int len)103*4882a593Smuzhiyun static inline __sum16 ip_compute_csum(const void *buf, int len)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	 return csum_fold (csum_partial(buf, len, 0));
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #define _HAVE_ARCH_IPV6_CSUM
csum_ipv6_magic(const struct in6_addr * saddr,const struct in6_addr * daddr,__u32 len,__u8 proto,__wsum sum)110*4882a593Smuzhiyun static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
111*4882a593Smuzhiyun 					  const struct in6_addr *daddr,
112*4882a593Smuzhiyun 					  __u32 len, __u8 proto,
113*4882a593Smuzhiyun 					  __wsum sum)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	unsigned long t0, t1, t2, t3;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	len += proto;	/* add 16-bit proto + len */
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	__asm__ __volatile__ (
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #if BITS_PER_LONG > 32
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	/*
124*4882a593Smuzhiyun 	** We can execute two loads and two adds per cycle on PA 8000.
125*4882a593Smuzhiyun 	** But add insn's get serialized waiting for the carry bit.
126*4882a593Smuzhiyun 	** Try to keep 4 registers with "live" values ahead of the ALU.
127*4882a593Smuzhiyun 	*/
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun "	ldd,ma		8(%1), %4\n"	/* get 1st saddr word */
130*4882a593Smuzhiyun "	ldd,ma		8(%2), %5\n"	/* get 1st daddr word */
131*4882a593Smuzhiyun "	add		%4, %0, %0\n"
132*4882a593Smuzhiyun "	ldd,ma		8(%1), %6\n"	/* 2nd saddr */
133*4882a593Smuzhiyun "	ldd,ma		8(%2), %7\n"	/* 2nd daddr */
134*4882a593Smuzhiyun "	add,dc		%5, %0, %0\n"
135*4882a593Smuzhiyun "	add,dc		%6, %0, %0\n"
136*4882a593Smuzhiyun "	add,dc		%7, %0, %0\n"
137*4882a593Smuzhiyun "	add,dc		%3, %0, %0\n"  /* fold in proto+len | carry bit */
138*4882a593Smuzhiyun "	extrd,u		%0, 31, 32, %4\n"/* copy upper half down */
139*4882a593Smuzhiyun "	depdi		0, 31, 32, %0\n"/* clear upper half */
140*4882a593Smuzhiyun "	add		%4, %0, %0\n"	/* fold into 32-bits */
141*4882a593Smuzhiyun "	addc		0, %0, %0\n"	/* add carry */
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun #else
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	/*
146*4882a593Smuzhiyun 	** For PA 1.x, the insn order doesn't matter as much.
147*4882a593Smuzhiyun 	** Insn stream is serialized on the carry bit here too.
148*4882a593Smuzhiyun 	** result from the previous operation (eg r0 + x)
149*4882a593Smuzhiyun 	*/
150*4882a593Smuzhiyun "	ldw,ma		4(%1), %4\n"	/* get 1st saddr word */
151*4882a593Smuzhiyun "	ldw,ma		4(%2), %5\n"	/* get 1st daddr word */
152*4882a593Smuzhiyun "	add		%4, %0, %0\n"
153*4882a593Smuzhiyun "	ldw,ma		4(%1), %6\n"	/* 2nd saddr */
154*4882a593Smuzhiyun "	addc		%5, %0, %0\n"
155*4882a593Smuzhiyun "	ldw,ma		4(%2), %7\n"	/* 2nd daddr */
156*4882a593Smuzhiyun "	addc		%6, %0, %0\n"
157*4882a593Smuzhiyun "	ldw,ma		4(%1), %4\n"	/* 3rd saddr */
158*4882a593Smuzhiyun "	addc		%7, %0, %0\n"
159*4882a593Smuzhiyun "	ldw,ma		4(%2), %5\n"	/* 3rd daddr */
160*4882a593Smuzhiyun "	addc		%4, %0, %0\n"
161*4882a593Smuzhiyun "	ldw,ma		4(%1), %6\n"	/* 4th saddr */
162*4882a593Smuzhiyun "	addc		%5, %0, %0\n"
163*4882a593Smuzhiyun "	ldw,ma		4(%2), %7\n"	/* 4th daddr */
164*4882a593Smuzhiyun "	addc		%6, %0, %0\n"
165*4882a593Smuzhiyun "	addc		%7, %0, %0\n"
166*4882a593Smuzhiyun "	addc		%3, %0, %0\n"	/* fold in proto+len, catch carry */
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun #endif
169*4882a593Smuzhiyun 	: "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len),
170*4882a593Smuzhiyun 	  "=r" (t0), "=r" (t1), "=r" (t2), "=r" (t3)
171*4882a593Smuzhiyun 	: "0" (sum), "1" (saddr), "2" (daddr), "3" (len)
172*4882a593Smuzhiyun 	: "memory");
173*4882a593Smuzhiyun 	return csum_fold(sum);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun #endif
177*4882a593Smuzhiyun 
178