1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _PARISC_CACHEFLUSH_H
3*4882a593Smuzhiyun #define _PARISC_CACHEFLUSH_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/mm.h>
6*4882a593Smuzhiyun #include <linux/uaccess.h>
7*4882a593Smuzhiyun #include <asm/tlbflush.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun /* The usual comment is "Caches aren't brain-dead on the <architecture>".
10*4882a593Smuzhiyun * Unfortunately, that doesn't apply to PA-RISC. */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /* Internal implementation */
13*4882a593Smuzhiyun void flush_data_cache_local(void *); /* flushes local data-cache only */
14*4882a593Smuzhiyun void flush_instruction_cache_local(void *); /* flushes local code-cache only */
15*4882a593Smuzhiyun #ifdef CONFIG_SMP
16*4882a593Smuzhiyun void flush_data_cache(void); /* flushes data-cache only (all processors) */
17*4882a593Smuzhiyun void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
18*4882a593Smuzhiyun #else
19*4882a593Smuzhiyun #define flush_data_cache() flush_data_cache_local(NULL)
20*4882a593Smuzhiyun #define flush_instruction_cache() flush_instruction_cache_local(NULL)
21*4882a593Smuzhiyun #endif
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun void flush_user_icache_range_asm(unsigned long, unsigned long);
26*4882a593Smuzhiyun void flush_kernel_icache_range_asm(unsigned long, unsigned long);
27*4882a593Smuzhiyun void flush_user_dcache_range_asm(unsigned long, unsigned long);
28*4882a593Smuzhiyun void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
29*4882a593Smuzhiyun void purge_kernel_dcache_range_asm(unsigned long, unsigned long);
30*4882a593Smuzhiyun void flush_kernel_dcache_page_asm(void *);
31*4882a593Smuzhiyun void flush_kernel_icache_page(void *);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* Cache flush operations */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun void flush_cache_all_local(void);
36*4882a593Smuzhiyun void flush_cache_all(void);
37*4882a593Smuzhiyun void flush_cache_mm(struct mm_struct *mm);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
40*4882a593Smuzhiyun void flush_kernel_dcache_page_addr(void *addr);
flush_kernel_dcache_page(struct page * page)41*4882a593Smuzhiyun static inline void flush_kernel_dcache_page(struct page *page)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun flush_kernel_dcache_page_addr(page_address(page));
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define flush_kernel_dcache_range(start,size) \
47*4882a593Smuzhiyun flush_kernel_dcache_range_asm((start), (start)+(size));
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun void flush_kernel_vmap_range(void *vaddr, int size);
50*4882a593Smuzhiyun void invalidate_kernel_vmap_range(void *vaddr, int size);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun #define flush_cache_vmap(start, end) flush_cache_all()
53*4882a593Smuzhiyun #define flush_cache_vunmap(start, end) flush_cache_all()
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
56*4882a593Smuzhiyun extern void flush_dcache_page(struct page *page);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define flush_dcache_mmap_lock(mapping) xa_lock_irq(&mapping->i_pages)
59*4882a593Smuzhiyun #define flush_dcache_mmap_unlock(mapping) xa_unlock_irq(&mapping->i_pages)
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define flush_icache_page(vma,page) do { \
62*4882a593Smuzhiyun flush_kernel_dcache_page(page); \
63*4882a593Smuzhiyun flush_kernel_icache_page(page_address(page)); \
64*4882a593Smuzhiyun } while (0)
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define flush_icache_range(s,e) do { \
67*4882a593Smuzhiyun flush_kernel_dcache_range_asm(s,e); \
68*4882a593Smuzhiyun flush_kernel_icache_range_asm(s,e); \
69*4882a593Smuzhiyun } while (0)
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
72*4882a593Smuzhiyun do { \
73*4882a593Smuzhiyun flush_cache_page(vma, vaddr, page_to_pfn(page)); \
74*4882a593Smuzhiyun memcpy(dst, src, len); \
75*4882a593Smuzhiyun flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \
76*4882a593Smuzhiyun } while (0)
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
79*4882a593Smuzhiyun do { \
80*4882a593Smuzhiyun flush_cache_page(vma, vaddr, page_to_pfn(page)); \
81*4882a593Smuzhiyun memcpy(dst, src, len); \
82*4882a593Smuzhiyun } while (0)
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn);
85*4882a593Smuzhiyun void flush_cache_range(struct vm_area_struct *vma,
86*4882a593Smuzhiyun unsigned long start, unsigned long end);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /* defined in pacache.S exported in cache.c used by flush_anon_page */
89*4882a593Smuzhiyun void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun #define ARCH_HAS_FLUSH_ANON_PAGE
92*4882a593Smuzhiyun static inline void
flush_anon_page(struct vm_area_struct * vma,struct page * page,unsigned long vmaddr)93*4882a593Smuzhiyun flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun if (PageAnon(page)) {
96*4882a593Smuzhiyun flush_tlb_page(vma, vmaddr);
97*4882a593Smuzhiyun preempt_disable();
98*4882a593Smuzhiyun flush_dcache_page_asm(page_to_phys(page), vmaddr);
99*4882a593Smuzhiyun preempt_enable();
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun #define ARCH_HAS_FLUSH_ON_KUNMAP
kunmap_flush_on_unmap(void * addr)104*4882a593Smuzhiyun static inline void kunmap_flush_on_unmap(void *addr)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun flush_kernel_dcache_page_addr(addr);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun #endif /* _PARISC_CACHEFLUSH_H */
110*4882a593Smuzhiyun
111