1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * OpenRISC Linux 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Linux architectural port borrowing liberally from similar works of 6*4882a593Smuzhiyun * others. All original copyrights apply as per the original source 7*4882a593Smuzhiyun * declaration. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * OpenRISC implementation: 10*4882a593Smuzhiyun * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com> 11*4882a593Smuzhiyun * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se> 12*4882a593Smuzhiyun * et al. 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifndef __ASM_OPENRISC_CPUINFO_H 16*4882a593Smuzhiyun #define __ASM_OPENRISC_CPUINFO_H 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun struct cpuinfo_or1k { 19*4882a593Smuzhiyun u32 clock_frequency; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun u32 icache_size; 22*4882a593Smuzhiyun u32 icache_block_size; 23*4882a593Smuzhiyun u32 icache_ways; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun u32 dcache_size; 26*4882a593Smuzhiyun u32 dcache_block_size; 27*4882a593Smuzhiyun u32 dcache_ways; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun u16 coreid; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun extern struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS]; 33*4882a593Smuzhiyun extern void setup_cpuinfo(void); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #endif /* __ASM_OPENRISC_CPUINFO_H */ 36